TCA9548A_16 Datasheet, PDF (17/36 Pages) Texas Instruments – Low-Voltage 8-Channel I2C Switch with Reset

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TCA9548A
SCPS207F – MAY 2012 – REVISED NOVEMBER 2016
8.5.4 Control Register
Following the successful acknowledgment of the address byte, the bus master sends a command byte that is
stored in the control register in the TCA9548A (see Figure 12). This register can be written and read via the I²C
bus. Each bit in the command byte corresponds to a SCn/SDn channel and a high (or 1) selects this channel.
Multiple SCn/SDn channels may be selected at the same time. When a channel is selected, the channel
becomes active after a stop condition has been placed on the I²C bus. This ensures that all SCn/SDn lines are in
a high state when the channel is made active, so that no false conditions are generated at the time of
connection. A stop condition always must occur immediately after the acknowledge cycle. If multiple bytes are
received by the TCA9548A, it saves the last byte received.
Channel Selection Bits (Read/Write)
B7 B6 B5 B4 B3 B2 B1 B0
Channel 0
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Figure 12. Control Register
Table 2 shows the TCA9548A Command Byte Definition.
Table 2. Command Byte Definition
CONTROL REGISTER BITS
B7
B6
B5
B4
B3
B2
B1
B0
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
X
X
X
X
X
X
X
1
0
0
0
0
0
0
0
0
COMMAND
Channel 0 disabled
Channel 0 enabled
Channel 1 disabled
Channel 1 enabled
Channel 2 disabled
Channel 2 enabled
Channel 3 disabled
Channel 3 enabled
Channel 4 disabled
Channel 4 enabled
Channel 5 disabled
Channel 5 enabled
Channel 6 disabled
Channel 6 enabled
Channel 7 disabled
Channel 7 enabled
No channel selected, power-up/reset
default state
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