LM3S817 Datasheet, PDF (17/553 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S817 Microcontroller
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Register 27:
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ........................................ 356
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 ................................ 359
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 ................................ 359
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 ................................ 359
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................... 359
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ............................. 360
ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ............................. 360
ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C ............................ 360
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................ 360
ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............... 361
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............... 361
ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ........................................ 362
ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ........................................ 362
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ............... 364
ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ........................................ 365
ADC Test Mode Loopback (ADCTMLB), offset 0x100 ....................................................... 366
Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 367
Register 1: UART Data (UARTDR), offset 0x000 ............................................................................... 375
Register 2: UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 377
Register 3: UART Flag (UARTFR), offset 0x018 ................................................................................ 379
Register 4: UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 381
Register 5: UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 382
Register 6: UART Line Control (UARTLCRH), offset 0x02C ............................................................... 383
Register 7: UART Control (UARTCTL), offset 0x030 ......................................................................... 385
Register 8: UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 387
Register 9: UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 389
Register 10: UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 391
Register 11: UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 392
Register 12: UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 393
Register 13: UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 395
Register 14: UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 396
Register 15: UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 397
Register 16: UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 398
Register 17: UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 399
Register 18: UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 400
Register 19: UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 401
Register 20: UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 402
Register 21: UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 403
Register 22: UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 404
Register 23: UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 405
Register 24: UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 406
Synchronous Serial Interface (SSI) ............................................................................................ 407
Register 1: SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 420
Register 2: SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 422
Register 3: SSI Data (SSIDR), offset 0x008 ...................................................................................... 424
Register 4: SSI Status (SSISR), offset 0x00C ................................................................................... 425
Register 5: SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 427
Register 6: SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 428
July 14, 2014
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