LM3S817 Datasheet, PDF (156/553 Pages) List of Unclassifed Manufacturers – Microcontroller

System Control
Figure 5-3. Reset Circuit Controlled by Switch
VDD
Stellaris®
R_PU
RST
R_S
C₁
5.2.2.4
Typical R_PU = 10 kΩ
Typical R_S = 470 Ω
C₁ = 10 nF
The R_PU and C₁ components define the power-on delay.
The external reset timing is shown in Figure 18-5 on page 512.
Brown-Out Reset (BOR)
A drop in the input voltage resulting in the assertion of the internal brown-out detector can be used
to reset the controller. This is initially disabled and may be enabled by software.
The system provides a brown-out detection circuit that triggers if the power supply (V_DD) drops
below a brown-out threshold voltage (V_BTH). The circuit is provided to guard against improper
operation of logic and peripherals that operate off the power supply voltage (V_DD) and not the LDO
voltage. If a brown-out condition is detected, the system may generate a controller interrupt or a
system reset. The BOR circuit has a digital filter that protects against noise-related detection for the
interrupt condition. This feature may be optionally enabled.
Brown-out resets are controlled with the Power-On and Brown-Out Reset Control (PBORCTL)
register. The BORIOR bit in the PBORCTL register must be set for a brown-out condition to trigger
a reset.
The brown-out reset sequence is as follows:
1. When V_DD drops below V_BTH, an internal BOR condition is set.
2. If the BORWT bit in the PBORCTL register is set and BORIOR is not set, the BOR condition is
resampled, after a delay specified by BORTIM, to determine if the original condition was caused
by noise. If the BOR condition is not met the second time, then no further action is taken.
3. If the BOR condition exists, an internal reset is asserted.
4. The internal reset is released and the controller fetches and loads the initial stack pointer, the
initial program counter, the first instruction designated by the program counter, and begins
execution.
5. The internal BOR condition is reset after 500 µs to prevent another BOR condition from being
set before software has a chance to investigate the original cause.
The internal Brown-Out Reset timing is shown in Figure 18-7 on page 512.
156
July 14, 2014
Texas Instruments-Production Data