LM3S817 Datasheet, PDF (109/553 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S817 Microcontroller
Bit/Field
27
26
25
24
23
22
21:18
Name
UNPENDSV
PENDSTSET
PENDSTCLR
reserved
ISRPRE
ISRPEND
reserved
Type
WO
R/W
WO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0x0
Description
PendSV Clear Pending
Value Description
0 On a write, no effect.
1 On a write, removes the pending state from the PendSV
exception.
This bit is write only; on a register read, its value is unknown.
SysTick Set Pending
Value Description
0 On a read, indicates a SysTick exception is not pending.
On a write, no effect.
1 On a read, indicates a SysTick exception is pending.
On a write, changes the SysTick exception state to pending.
This bit is cleared by writing a 1 to the PENDSTCLR bit.
SysTick Clear Pending
Value Description
0 On a write, no effect.
1 On a write, removes the pending state from the SysTick
exception.
This bit is write only; on a register read, its value is unknown.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Debug Interrupt Handling
Value Description
0 The release from halt does not take an interrupt.
1 The release from halt takes an interrupt.
This bit is only meaningful in Debug mode and reads as zero when the
processor is not in Debug mode.
Interrupt Pending
Value Description
0 No interrupt is pending.
1 An interrupt is pending.
This bit provides status for all interrupts excluding NMI and Faults.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
July 14, 2014
109
Texas Instruments-Production Data