TMS320TCI6487ZUN Datasheet, PDF (165/219 Pages) Texas Instruments – TMS320TCI6487/8 Communications Infrastructure Digital Signal Processor

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FSEVT2
FSEVT3
TIMI0
TIMI1
TMS320TCI6487
TMS320TCI6488
SPRS358L – APRIL 2007 – REVISED APRIL 2011
SYSCLK/6 TIMO0
TIMO1
TINPHSEL 0
TINPLSEL 0
TINPHSEL 1
TINPLSEL 1
TINPHSEL 2
TINPLSEL 2
TINPHSEL 3
TINPLSEL 3
TINPHSEL 4
TINPLSEL 4
TINPHSEL 5
TINPLSEL 5
TOUTSEL 1
TOUTSEL 0
0123
0123
0123
0123
0123
0123
0123
0123
0123
0123
0123
0123
0 1 2 3 4 5 6 7 8 91011
0 1 2 3 4 5 6 7 8 91011
Timer Pin Manager
(TPMGR)
CFG SCR ³²
(SCR F)
Timer64
0
vbusp
Timer64
1
Timer642
2
Timer64
3
Timer64
4
Timer64
5
Figure 8-38. Timer Manager Block Diagram
Note that the TMS320C6472/TMS320TCI648x DSP 64-Bit Timer User’s Guide (literature number
SPRU818) uses different labels for its inputs and outputs. To avoid confusion with respect to numbering, a
different convention is used in this document, as shown in Table 8-64.
TIMER
n
n
n
n
SIGNAL NAME
TINP12
TINP34
TOUT12
TOUT34
Table 8-64. Timer Pin Naming
RENAMED TO
TINPLn
TINPHn
TOUTLn
TOUTHn
DESCRIPTION
Timer n input event (low half). Used to drive lower 32-bit timer, 64-bit timer.
Used in watchdog mode.
Timer n input event (high half). Used to drive upper 32-bit timer. Unused in
64-bit or watchdog modes.
Timer n output (low half). Driven by lower 32-bit timer, 64-bit timer, or
watchdog timer as either a pulse or waveform.
Timer n output (high half). Driven by upper 32-bit timer as either a pulse or
waveform. Unused in 64-bit or watchdog modes.
8.15.1.1.1 Timer Input Selection Register (TINPSEL)
Timer input selection is handled in the Timer input selection register (TINPSEL). The TINPSEL register is
shown in Figure 8-39 and described in Table 8-65.
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Peripheral Information and Electrical Specifications 165
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