TMS320DA707B Datasheet, PDF (16/91 Pages) Texas Instruments – Floating-Point Digital Signal Processors

Aureus TMS320DA707, TMS320DA707B, TMS320DA787B
Floating-Point Digital Signal Processors
SPRS279E – JULY 2005 – REVISED FEBRUARY 2008
www.ti.com
2.16.2 CPU Interrupt Assignments
Table 2-4 lists the interrupt channel assignments on the DA707/B/DA787B device. If more than one
source is listed, the interrupt channel is shared and an interrupt on this channel could have come from any
of the enabled peripherals on that channel.
Note that most peripheral interrupt and DMA events are routed first through the dMAX unit (see
Table 3-2.)
After being processed, the dMAX unit can generate a CPU interrupt. This allows the dMAX to take a
significant portion of the interrupt processing burden off of the CPU.
CPU INTERRUPT
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
INT8
INT9
INT10
INT11
INT12
INT13
INT14
INT15
Table 2-4. CPU Interrupt Assignments
INTERRUPT SOURCE
RESET
NMI (From dMAX)
Reserved
Reserved
RTI Interrupt 0
RTI Interrupt 1, 2, 3, and RTI Overflow Interrupt 0 and 1.
Reserved
dMAX Event 0
dMAX Event 1
dMAX Event 2
dMAX Event 3
dMAX Event 4
dMAX Event 5
dMAX Event 6
I2C0, I2C1, SPI0, SPI1 Interrupts
dMAX Event 7
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