TCA9545A Datasheet, PDF (16/30 Pages) Texas Instruments – Low Voltage 4-channel I2C and SMbus Switch With Interrupt Logic and Reset Functions

TCA9545A
SCPS204B – JANUARY 2014 – REVISED MARCH 2014
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Control Register (continued)
Table 1. Control Register Write (Channel Selection), Control Register Read (Channel Status)⁽¹⁾
INT3
INT2
INT1
INT0
B3
B2
B1
B0
COMMAND
0
Channel 0 disabled
X
X
X
X
X
X
X
1
Channel 0 enabled
0
Channel 1 disabled
X
X
X
X
X
X
X
1
Channel 1 enabled
0
Channel 2 disabled
X
X
X
X
X
X
X
1
Channel 2 enabled
0
Channel 3 disabled
X
X
X
X
X
X
X
1
Channel 3 enabled
0
0
0
0
0
0
X
0
No channel selected,
power-up/reset default state
(1) Several channels can be enabled at the same time. For example, B3 = 0, B2 = 1, B1 = 1, B0 = 0 means that channels 0 and 3 are
disabled, and channels 1 are 2 and enabled. Care should be taken not to exceed the maximum bus capacity.
9.6.4 Interrupt Handling
The TCA9545A provides four interrupt inputs (one for each channel) and one open-drain interrupt output (see
Table 2). When an interrupt is generated by any device, it is detected by the TCA9545A and the interrupt output
is driven low. The channel does not need to be active for detection of the interrupt. A bit also is set in the control
register.
Bits 4–7 of the control register correspond to channels 0–3 of the TCA9545A, respectively. Therefore, if an
interrupt is generated by any device connected to channel 1, the state of the interrupt inputs is loaded into the
control register when a read is accomplished. Likewise, an interrupt on any device connected to channel 0 would
cause bit 4 of the control register to be set on the read. The master then can address the TCA9545A and read
the contents of the control register to determine which channel contains the device generating the interrupt. The
master then can reconfigure the TCA9545A to select this channel and locate the device generating the interrupt
and clear it.
It should be noted that more than one device can provide an interrupt on a channel, so it is up to the master to
ensure that all devices on a channel are interrogated for an interrupt.
The interrupt inputs can be used as general-purpose inputs if the interrupt function is not required.
If unused, interrupt input(s) must be connected to V_CC.
Table 2. Control Register Read (Interrupt)⁽¹⁾
INT3
INT2
INT1
INT0
B3
B2
B1
B0
COMMAND
0
No interrupt on channel 0
X
X
X
X
X
X
X
1
Interrupt on channel 0
0
No interrupt on channel 1
X
X
X
X
X
X
X
1
Interrupt on channel 1
0
No interrupt on channel 2
X
X
X
X
X
X
X
1
Interrupt on channel 2
0
No interrupt on channel 3
X
X
X
X
X
X
X
1
Interrupt on channel 3
(1) Several interrupts can be active at the same time. For example, INT3 = 0, INT2 = 1, INT1 = 1, INT0 = 0 means that there is no interrupt
on channels 0 and 3, and there is interrupt on channels 1 and 2.
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