TCA9545A Datasheet, PDF (14/30 Pages) Texas Instruments – Low Voltage 4-channel I2C and SMbus Switch With Interrupt Logic and Reset Functions

TCA9545A
SCPS204B – JANUARY 2014 – REVISED MARCH 2014
Programming (continued)
www.ti.com
Data Output
by Transmitter
Data Output
by Receiver
NACK
ACK
SCL From
Master
S
Start
Condition
1
2
8
Figure 11. Acknowledgment on the I²C Bus
9
Clock Pulse for ACK
A master receiver must signal an end of data to the transmitter by not generating an acknowledge (NACK) after
the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line high.
In this event, the transmitter must release the data line to enable the master to generate a stop condition.
Data is transmitted to the TCA9545A control register using the write mode shown in Figure 12.
Slave Address
Control Register
SDA S 1 1 1 0 0 A1 A0 0 A X X X X B3 B2 B1 B0 A P
Start Condition
R/W ACK From Slave
ACK From Slave Stop Condition
Figure 12. Write Control Register
Data is read from the TCA9545A control register using the read mode shown in Figure 13.
Slave Address
Control Register
SDA S 1 1 1 0 0 A1 A0 1 A INT3 INT2 INT1 INT0 B3 B2 B1 B0 NA P
Start Condition
R/W ACK From Slave
NACK From Master Stop Condition
Figure 13. Read Control Register
14
Submit Documentation Feedback
Product Folder Links: TCA9545A
Copyright © 2014, Texas Instruments Incorporated