DS50PCI402 Datasheet, PDF (16/36 Pages) Texas Instruments – DS50PCI402 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Repeater with Equalization and De-Emphasis

Electrical Characteristics — Serial Management Bus Interface
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
Typ
SERIAL BUS INTERFACE DC SPECIFICATIONS
V_IL
Data, Clock Input Low Voltage
V_IH
Data, Clock Input High Voltage
2.1
I_PULLUP
Current Through Pull-Up Resistor High Power Specification
4
or Current Source
V_DD
I_LEAK-Bus
I_LEAK-Pin
C_I
R_TERM
Nominal Bus Voltage
Input Leakage Per Bus Segment (Note 17)
Input Leakage Per Device Pin
Capacitance for SDA and SCL (Note 17, Note 18)
External Termination Resistance Pullup V_DD = 3.3V,
pull to V_DD = 2.5V ± 5% OR 3.3V ± (Note 17, Note 18, Note 19)
10%
Pullup V_DD = 2.5V,
(Note 17, Note 18, Note 19)
2.375
-200
-15
2000
1000
SERIAL BUS INTERFACE TIMING SPECIFICATIONS. See Figure 7
FSMB
Bus Operating Frequency
(Note 20)
10
TBUF
Bus Free Time Between Stop and
Start Condition
4.7
THD:STA
Hold time after (Repeated) Start At I_PULLUP, Max
Condition. After this period, the first
4.0
clock is generated.
TSU:STA
Repeated Start Condition Setup
Time
4.7
TSU:STO Stop Condition Setup Time
4.0
THD:DAT Data Hold Time
300
TSU:DAT Data Setup Time
250
T_TIMEOUT
Detect Clock Low Timeout
(Note 20)
25
T_LOW
Clock Low Period
4.7
T_HIGH
Clock High Period
(Note 20)
4.0
T_LOW:SEXT Cumulative Clock Low Extend
Time (Slave Device)
(Note 20)
t_F
Clock/Data Fall Time
(Note 20)
t_R
Clock/Data Rise Time
(Note 20)
t_POR
Time in which a device must be (Note 20)
operational after power-on reset
Max
0.8
3.6
3.6
+200
10
100
35
50
2
300
1000
500
Units
V
V
mA
V
µA
µA
pF
Ω
Ω
kHz
µs
µs
µs
µs
ns
ns
ms
µs
µs
ms
ns
ns
ms
Note 17: Recommended value. Parameter not tested in production.
Note 18: Recommended maximum capacitance load per bus segment is 400pF.
Note 19: Maximum termination voltage should be identical to the device supply voltage.
Note 20: Compliant to SMBus 2.0 physical layer specification. See System Management Bus (SMBus) Specification Version 2.0, section 3.1.1 SMBus common
AC specifications for details.
15
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