DRV8850 Datasheet, PDF (15/22 Pages) Texas Instruments – Low-Voltage H-Bridge IC With LDO Voltage Regulator

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LDO regulator
DRV8850
SLVSCC0A – NOVEMBER 2013 – REVISED JANUARY 2014
LDOOUT
LDOFB
LDOOUT
R1
2.2 µF
R2
Figure 18. LDO Regulator Schematic
The output voltage is adjustable from 1.6 V to VCC – V_LDO using external resistors. The LDOEN pin is used to
enable or disable the LDO regulator; when disabled, the output is turned off and the LDO regulator enters a very-
low-power state.
When the LDO current load exceeds I_CL, the LDO regulator behaves like a constant current source. The LDO
output voltage drops significantly with currents greater than I_CL.
Protection Circuits
The DRV8850 device is protected against undervoltage, overvoltage, overcurrent, and overtemperature events.
Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than t_OCP, all FETs in the H-bridge are disabled. After approximately
t_RETRY, the bridge re-enables automatically.
Overcurrent conditions on both high and low-side devices, that is, a short to ground, supply, or across the motor
winding result in an overcurrent shutdown.
Thermal Shutdown (TSD)
If the die temperature exceeds t_TSD, all FETs in the H-bridge are disabled. Once the die temperature has fallen
below t_TSD – t_HYS, the H-bridge automatically re-enables.
Undervoltage Lockout (UVLO)
If at any time the voltage on the VCC pins falls to less than the undervoltage lockout threshold voltage, all
circuitry in the device is disabled and internal logic resets. Operation resumes when VCC rises to greater than
the UVLO threshold.
Overvoltage Lockout (OVLO)
If at any time the voltage on the VCC pins rises to more than V_OVLO, the output FETs are disabled (outputs are
high-Z). Operation resumes when VCC falls below the V_OVLO.
CAUTION
VCC must remain less than the absolute maximum rating for the device, or damage to
the device may occur.
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