DRV10983-Q1 Datasheet, PDF (15/72 Pages) Texas Instruments – Automotive, Three-Phase, Sensorless BLDC Motor Driver

www.ti.com
Feature Description (continued)
DRV10983-Q1
SLVSD14 – JUNE 2017
100% PWM DCO
50% PWM DC0
VCC
VCC/2
Figure 9. Output Voltage Amplitude Adjustment
Motor speed is controlled indirectly by controlling the output amplitude, which is achieved by either controlling
V_CC, or controlling the PWM_DCO. The DRV10983-Q1 device provides different options for the user to control
the PWM_DCO:
• Analog input (SPEED pin)
• PWM encoded digital input (SPEED pin)
• I²C serial interface.
See the Closed Loop section for more information.
8.3.4 Load Dump Handling
The recommended operation voltage of the DRV10983-Q1 device is from 6.2 V to 28 V. The device is able to
drive the motor within this V_CC range.
In the load dump condition, V_CC can rise up to 45 V. Once the DRV10983-Q1 device detects that V_CC is higher
than V_{OV_R}3 , it stops driving the motor and protects its own circuitry. When V_CC drops below V_{OV_F}, the
DRV10983-Q1 device continues to operate the motor based on the user’s command.
8.3.5 Sleep or Standby Condition
The DRV10983-Q1 device is available in either a sleep mode (DRV10983Q) or standby mode version
(DRV10983SQ). The DRV10983-Q1 device enters either sleep or standby to conserve energy. When the device
enters either sleep or standby, the device stops driving the motor. The switching regulator is disabled in the sleep
mode version to conserve more energy. The I²C interface is disabled and any register data not stored in
EEPROM is reset for the sleep mode version. The switching regulator remains active in the standby mode
version. The register data is maintained, and the I²C interface remains active for standby mode version.
For different speed command modes, Table 1 shows the timing and command to enter the sleep or standby
condition.
Table 1. Conditions to Enter or Exit Sleep or Standby Condition
SPEED
COMMAND
MODE
ENTER SLEEP OR STANDBY
CONDITION
Analog
PWM
I²C
SPEED pin voltage < V_{EN_SL_SB} for
t_{EN_SL_SB}
SPEED pin low (V < V_{DIG_IL}) for
t_{EN_SL_SB}
SpdCtrl[8:0] is programmed as 0 for
t_{EN_SL_SB}
EXIT FROM STANDBY CONDITION
EXIT FROM SLEEP CONDITION
SPEED pin voltage > V_{EX_SB} for t_{EX_ SB}
SPEED pin high (V > V_{DIG_IH}) for
t_{EX_SL_SB}
SpdCtrl[8:0] is programmed as non-zero
for t_{EX_SL_SB}
SPEED pin high (V > V_{DIG_IH}) for
t_{EX_SL_SB}
SPEED pin high (V > V_{DIG_IH}) for
t_{EX_SL_SB} ⁽¹⁾
SPEED pin high (V > V_{DIG_IH}) for
t_{EX_SL_SB}
(1) See Table 2 for details on PWM duty cycle requirements to exit sleep mode.
Copyright © 2017, Texas Instruments Incorporated
Product Folder Links: DRV10983-Q1
Submit Documentation Feedback
15