DS90LV027A_16 Datasheet, PDF (14/21 Pages) Texas Instruments – LVDS Dual High Speed Differential Driver

DS90LV027A
SNLS026D – MARCH 2000 – REVISED JUNE 2016
11 Layout
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11.1 Layout Guidelines
• Use at least 4 PCB layers (top to bottom); LVDS signals, ground, power, and TTL signals.
• Isolate TTL signals from LVDS signals, otherwise the TTL may couple onto the LVDS lines. Best practice is to
place TTL and LVDS signals on different layers which are isolated by power or ground plane(s).
• Keep drivers and receivers as close to the (LVDS port side) connectors as possible.
11.2 Layout Example
LVCMOS
Inputs
Decoupling Cap
(Bottom Layer)
DS90LV027A
1 V_CC
2 DI 1
DO- 1 8
DO+ 1 7
3 DI 2
DO+ 2 6
4 GND
DO- 2 5
DS90LV028A
1 R_IN1-
VCC 16
2 R_IN1+
ROUT1 15
3 R_IN2+
ROUT2 14
4 RIN2-
GND 13
Input Termination
(Required)
Figure 22. Simplified DS90LV027A and DS90LV028A Layout
Series Termination (optional)
LVCMOS
Outputs
Decoupling Cap
(Bottom Layer)
14
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