LP3923_15 Datasheet, PDF (13/37 Pages) Texas Instruments – Cellular Phone Power Management Unit

LP3923
www.ti.com
SNVS567B – APRIL 2010 – REVISED MAY 2013
Charger Electrical Characteristics (continued)
Unless otherwise noted, V_{CHG_IN} = 5V, V_IN= BATT = 3.6V, C_{CHG_IN} = 1 μF, V_BATT = 30 µF. Typical values and limits appearing
in normal type apply for T_J = 25°C. Limits appearing in boldface type apply over the entire junction temperature range for
operation, T_A = T_J = −25°C to +85°C.⁽¹⁾⁽²⁾
Symbol
Parameter
Conditions
Typical
Limit
Units
Min
Max
I_EOC
End-of-charging
0.1C option selected
current, % of full-rate
current
10
%
V_RESTART
Restart threshold voltage From V_TERM voltage (4.2V, −100 mV options
selected)
−100
−70
−130
mV
I_MON
C_BATT
T_REG
I_MON Voltage 1
I_MON Voltage 2
Capacitance on BATT
Regulated junction
temperature
I_CHG = 100 mA
I_CHG = 400 mA
See ⁽⁴⁾
See ⁽⁴⁾
0.247
V
0.988
0.840 1.127
30
1000
µF
115
°C
Detection and Timing (one combined timer)
T_POK
Power OK deglitch time V_CHG > V_BATT + V_{OK_CHG}
30
ms
T_{PC_FULL}
Deglitch time
From pre-charging to full-rate charging
210
ms
T_CHG
Charge timer
Pre-charge mode
1
disabled
2
Hrs
CC mode/CV mode (combined timer)
5
8
T_EOC
Deglitch time for end- of-
charge transition
210
ms
(4) Ensured by design.
Serial Interface
Unless otherwise noted, V_IN = BATT = 3.6V, GND = 0V, C_VIN1–2 = 10 µF C_LDOx = 1 µF and V_LDO3 = 3.0V. Typical values and
limits appearing in normal type apply for T_J = 25°C. Limits appearing in boldface type apply over the entire junction
temperature range for operation, T_A = T_J = −40°C to +125°C.⁽¹⁾⁽²⁾
Symbol
Parameter
Conditions
Typ
Limit
Min Max
Unit
s
f_CLK
t_BF
t_HOLD
t_CLK-LP
t_CLK-HP
t_SU
t_DATA-HOLD
t_DATA-SU
t_SU
t_TRANS
Clock Frequency
Bus-Free Time between START and STOP
Hold Time Repeated START Condition
CLK Low Period
CLK High Period
Set-Up Time Repeated START Condition
Data Hold Time
Data Set-Up Time
Set-Up Time for STOP Condition
Maximum Pulse Width of Spikes that Must Be
Suppressed by the Input Filter of Both DATA & CLK
Signals
400 kHz
1.3
µs
0.6
µs
1.3
µs
0.6
µs
0.6
µs
50
ns
100
ns
0.6
µs
50
ns
(1) All limits are specified. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot
and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical
process control.
(2) Ensured by design.
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