LMH2180_14 Datasheet, PDF (13/22 Pages) Texas Instruments – 75 MHz Dual Clock Buffer

LMH2180
www.ti.com
SNAS419C – JANUARY 2008 – REVISED AUGUST 2011
APPLICATION INFORMATION
GENERAL
The LMH2180 is designed to minimize the effects of spurious signals from the base chip to the oscillator. Also
the influence of varying load resistance and capacitance to the oscillator is minimized, while the drive capability is
increased.
The inputs of the LMH2180 are internally biased at 1V, making AC coupling possible without external bias
resistors.
To optimize current consumption, a buffer that is not in use can be disabled by connecting it's enable pin to V_SS.
The LMH2180 has no internal ground reference; therefore, either single or split supply configurations can be
used.
The LMH2180 is an easy replacement for discrete circuitry. It simplifies board layout and minimizes the effect of
layout related parasitic components.
INPUT CONFIGURATION
The internal 1V input biasing allows AC coupling of the input signal. This biasing avoids the use of external
resistors, as depicted in Figure 36. The biasing prevents a large DC load at the oscillators output that creates a
load impedance and may affect it's oscillating frequency. As a result of this biasing, the maximum amplitude of
the AC signal is 2V_PP.
The coupling capacitance C1 should be large enough to let the AC signal pass. This is a unity gain buffer with
rail-to-rail inputs and outputs.
V_DD
OSC
IN
C1
ENABLE
1V
OUT
V_SS
Figure 36. Input Configuration
FREQUENCY PULLING
Frequency pulling is the frequency variation of an oscillator caused by a varying load. In the typical application,
the load of the oscillator is a fixed capacitor (C1) in series with the input impedance of the buffer.
To keep the input impedance as constant as possible, the input is biased at 1V, even when the part is disabled.
A simplified schematic of the input configuration is shown in Figure 36.
ISOLATION AND CROSSTALK
Output to input isolation prevents the clock signal of the oscillator from being affected by spurious signals
generated by the digital blocks behind the output buffer. See Figure 13.
A block diagram of the isolation is shown in Figure 37. Crosstalk rejection between buffers prevents signals from
affecting each other. Figure 37 shows a Baseband IC and a Bluetooth module as an example. See Figure 14 for
more information.
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