LM3S5791_16 Datasheet, PDF (1235/1336 Pages) Texas Instruments – Stellaris LM3S5791 Microcontroller

Stellaris^® LM3S5791 Microcontroller
Table 23-9. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Type^a
Description
PWM6
L1
O
TTL
PWM 6. This signal is controlled by PWM Generator
L5
3.
L7
K3
PWM7
M2
O
TTL
PWM 7. This signal is controlled by PWM Generator
M5
3.
C10
M7
GND
C4
-
Power Ground reference for logic and I/O pins.
C5
J3
K5
K10
J10
F11
F12
GNDA
A5
-
Power The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
E3
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDDC pins at the board level in
addition to the decoupling capacitor(s).
Power
VDD
K7
-
Power Positive supply for I/O and some logic.
G12
K8
K9
H10
G10
E10
G11
VDDA
C7
-
Power The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 25-2 on page 1247 , regardless
of system implementation.
VDDC
D3
-
Power Positive supply for most of the logic function,
C3
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 25-6 on page 1252 .
July 03, 2014
Texas Instruments-Production Data
1235