LM3S5791_16 Datasheet, PDF (1039/1336 Pages) Texas Instruments – Stellaris LM3S5791 Microcontroller

Stellaris^® LM3S5791 Microcontroller
OTG A /
Host
OTG B /
Device
Register 324: USB General-Purpose Control and Status (USBGPCS), offset
0x41C
USBGPCS provides the state of the internal ID signal.
Note:
When used in OTG mode, USB0VBUS and USB0ID do not require any configuration as they
are dedicated pins for the USB controller and directly connect to the USB connector's VBUS
and ID signals. If the USB controller is used as either a dedicated Host or Device, the
DEVMODOTG and DEVMOD bits in the USB General-Purpose Control and Status
(USBGPCS) register can be used to connect the USB0VBUS and USB0ID inputs to fixed
levels internally, freeing the PB0 and PB1 pins for GPIO use. For proper self-powered Device
operation, the VBUS value must still be monitored to assure that if the Host removes VBUS,
the self-powered Device disables the D+/D- pull-up resistors. This function can be
accomplished by connecting a standard GPIO to VBUS.
The termination resistors for the USB PHY have been added internally, and thus there is
no need for external resistors. For a device, there is a 1.5 KOhm pull-up on the D+ and for
a host there are 15 KOhm pull-downs on both D+ and D-.
USB General-Purpose Control and Status (USBGPCS)
Base 0x4005.0000
Offset 0x41C
Type R/W, reset 0x0000.0001
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
DEVMODOTG DEVMOD
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Bit/Field
31:2
1
Name
reserved
DEVMODOTG
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W
0
Enable Device Mode
This bit enables the DEVMOD bit to control the state of the internal ID
signal in OTG mode.
Value Description
0 The mode is specified by the state of the internal ID signal.
1 This bit enables the DEVMOD bit to control the internal ID signal.
0
DEVMOD
R/W
1
Device Mode
This bit specifies the state of the internal ID signal in Host mode and in
OTG mode when the DEVMODOTG bit is set.
In Device mode this bit is ignored (assumed set).
Value Description
0 Host mode
1 Device mode
July 03, 2014
Texas Instruments-Production Data
1039