LM3S5791_16 Datasheet, PDF (1000/1336 Pages) Texas Instruments – Stellaris LM3S5791 Microcontroller

Universal Serial Bus (USB) Controller
Bit/Field
2
1
0
Name
DMAMOD
DTWE
DT
Type
R/W
R/W
R/W
Reset
0
0
0
Description
DMA Request Mode
Value Description
0 An interrupt is generated after every µDMA packet transfer.
1 An interrupt is generated only after the entire μDMA transfer is
complete.
Note: This bit must not be cleared either before or in the same cycle
as the above DMAEN bit is cleared.
Data Toggle Write Enable
Value Description
0 The DT bit cannot be written.
1 Enables the current state of the transmit endpoint data to be
written (see DT bit).
This bit is automatically cleared once the new value is written.
Data Toggle
When read, this bit indicates the current state of the transmit endpoint
data toggle.
If DTWE is High, this bit may be written with the required setting of the
data toggle. If DTWE is Low, any value written to this bit is ignored. Care
should be taken when writing to this bit as it should only be changed to
RESET the transmit endpoint.
OTG B / Device Mode
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1)
Base 0x4005.0000
Offset 0x113
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
AUTOSET ISO MODE DMAEN FDT DMAMOD
reserved
Type R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
Name
AUTOSET
Type
R/W
Reset
0
Description
Auto Set
Value Description
0 The TXRDY bit must be set manually.
1 Enables the TXRDY bit to be automatically set when data of the
maximum packet size (value in USBTXMAXPn) is loaded into
the transmit FIFO. If a packet of less than the maximum packet
size is loaded, then the TXRDY bit must be set manually.
1000
Texas Instruments-Production Data
July 03, 2014