TM4C129EKCPDT Datasheet, PDF (1208/2012 Pages) Texas Instruments – Tiva Microcontroller

Analog-to-Digital Converter (ADC)
Bit/Field
17
16
15:12
11
10
Name
DCINSS1
DCINSS0
reserved
DMAIN3
DMAIN2
Type
RO
RO
RO
RW1C
RW1C
Reset
0
0
0
0
0
Description
Digital Comparator Interrupt Status on SS1
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 Both the INRDC bit in the ADCRIS register and the DCONSS1
bit in the ADCIM register are set, providing a level-based
interrupt to the interrupt controller.
This bit is cleared by writing a 1 to it. Clearing this bit also clears the
INRDC bit in the ADCRIS register.
Digital Comparator Interrupt Status on SS0
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 Both the INRDC bit in the ADCRIS register and the DCONSS0
bit in the ADCIM register are set, providing a level-based
interrupt to the interrupt controller.
This bit is cleared by writing a 1 to it. Clearing this bit also clears the
INRDC bit in the ADCRIS register.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SS3 DMA Interrupt Status and Clear
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 Both the DMAINR3 bit in the ADCRIS register and the DMAMASK3
bit in the ADCIM register are set, providing a level-based
interrupt to the interrupt controller.
This bit is cleared by writing a 1. Clearing this bit also clears the
DMAINR3 bit in the ADCRIS register.
SS2 DMA Interrupt Status and Clear
Value Description
0 No interrupt has occurred or the interrupt is masked.
1 Both the DMAINR2 bit in the ADCRIS register and the DMAMASK2
bit in the ADCIM register are set, providing a level-based
interrupt to the interrupt controller.
This bit is cleared by writing a 1. Clearing this bit also clears the
DMAINR2 bit in the ADCRIS register.
1208
Texas Instruments-Production Data
June 18, 2014