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| ADS8327_14 Datasheet, PDF (12/51 Pages) Texas Instruments – LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE | |||
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ADS8327
ADS8328
SLAS415E â APRIL 2006 â REVISED JANUARY 2011
MANUAL TRIGGER / READ While Sampling
(use internal CCLK, EOC and INT polarity programmed as active low)
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CONVST
Nth
twL(CONVST)
EOC
(active low)
tSAMPLE1 = 3 CCLKs min
INT
(active low)
CS/FS
SCLK
th(CSF-EOC)
th(CSF-EOS)
SDO
Nth
tCONV = 18 CCLKs
tSAMPLE1 = 3 CCLKs min
th(CSR-EOS)
tsu(CSF-EOC)
1 . . . . . . . . . . . . . . . . . . . . 16
Nthâ1st
th(CSF-EOC)
td(CSR-EOS) = 20 ns min
tsu(CSF-EOS)
1
Nth
SDI
1101b
READ Result
1101b
READ Result
Figure 1. Timing for Conversion and Acquisition Cycles for Manual Trigger (Read While Sampling)
AUTO TRIGGER / READ While Sampling
(use internal CCLK, EOC and INT polarity programmed as active low)
CONVST = 1
EOC
Nth
(active low)
INT
(active low)
CS/FS
tCONV = 18 CCLKs
tSAMPLE2 = 3 CCLKs
tCONV = 18 CCLKs
th(CSF-EOC)
tsu(CSF-EOS)
th(CSF-EOS)
tSAMPLE2 = 3 CCLKs
tsu(CSF-EOS)
SCLK
SDO
1 . . . . . . . . . . . . . . . . . . .16
N â 2nd
1 . . . . . . . . . . . . . . . . . . .16
N â 1st
th(CSF-EOC)
1
Nth
SDI
1110b. . . . . . . . . . . . . .
CONFIGURE
1101b
READ Result
1101b
READ Result
Figure 2. Timing for Conversion and Acquisition Cycles for Autotrigger (Read While Sampling)
12
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Product Folder Link(s): ADS8327 ADS8328
© 2006â2011, Texas Instruments Incorporated
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