LMK04803_14 Datasheet, PDF (111/139 Pages) Texas Instruments – Low-Noise Clock Jitter Cleaner

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LMK04803, LMK04805, LMK04806, LMK04808
SNAS489K – MARCH 2011 – REVISED DECEMBER 2014
Table 125. Example RMS Jitter and Clock Output Phase Noise for LMK04808
with a 20.48 MHz Crystal Driving OSCin (T = 25 °C, V_CC = 3.3 V) ⁽¹⁾
INTEGRATION
BANDWIDTH
RMS JITTER (fs rms)
CLOCK OUTPUT TYPE
PLL2 PDF = 20.48 MHz
(EN_PLL2_REF2X = 0,
XTAL_LVL = 3)
f_CLK = 245.76 MHz
PLL2 PDF = 40.96 MHz
(EN_PLL2_REF2X = 1, XTAL_LVL = 3)
f_CLK = 122.88 MHz
f_CLK = 245.76 MHz
LVCMOS
374
412
382
100 Hz – 20 MHz
LVDS
419
421
372
LVPECL 1.6 Vpp
460
448
440
LVCMOS
226
195
190
10 kHz – 20 MHz
LVDS
231
205
194
LVPECL 1.6 Vpp
226
191
188
PHASE NOISE (dBc/Hz)
Offset
Clock Output Type
PLL2 PDF = 20.48 MHz
(EN_PLL2_REF2X = 0,
XTAL_LVL = 3)
PLL2 PDF = 40.96 MHz
(EN_PLL2_REF2X = 1, XTAL_LVL = 3)
LVCMOS
f_CLK = 245.76 MHz
-87
f_CLK = 122.88 MHz
-93
f_CLK = 245.76 MHz
-87
100 Hz
LVDS
-86
-91
-86
LVPECL 1.6 Vpp
-86
-92
-85
LVCMOS
-115
-121
-115
1 kHz
LVDS
-115
-123
-116
LVPECL 1.6 Vpp
-114
-122
-116
LVCMOS
-117
-128
-122
10 kHz
LVDS
-117
-128
-122
LVPECL 1.6 Vpp
-117
-128
-122
LVCMOS
-130
-135
-129
100 kHz
LVDS
-130
-135
-129
LVPECL 1.6 Vpp
-129
-135
-129
LVCMOS
-150
-154
-148
1 MHz
LVDS
-149
-153
-148
LVPECL 1.6 Vpp
-150
-154
-148
LVCMOS
-159
-162
-159
40 MHz
LVDS
-157
-159
-157
LVPECL 1.6 Vpp
-159
-161
-159
(1) Performance data and crystal specifications contained in this section are based on Vectron model VXB1-1150-20M480, 20.48 MHz.
PLL1 has a narrow loop bandwidth, PLL2 loop parameters are: C1 = 150 pF, C2 = 120 nF, R2 = 470 Ω, Charge Pump current = 3.2 mA,
Phase detector frequency = 20.48 MHz or 40.96 MHz, VCO frequency = 2949.12 MHz. Loop filter was optimized for 40.96 MHz phase
detector performance.
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