LP3925 Datasheet, PDF (11/51 Pages) Texas Instruments – High Performance Power Management Unit for Handset Applications

Device Operating Modes
POWER-ON-RESET: All internal registers are reset to default values. This is the default state after applying power to the PMU,
duration 1ms.
STANDBY:
All functions disabled (except RTC power management); PMU is in low power mode.
START UP:
Startup sequence is triggered by setting PWR_ON input high for 100 ms or by setting HF_PWR input high
for 100 ms or by connecting a suitable voltage to charger input. For MPL or RTC ALARM events the startup
sequence begins after 2ms delay from the MPL or RTC ALARM events. During the sequence the regulators
on PMU are enabled according to a pre-programmed timing pattern. If the regulators are enabled,
RSTOUT_N is released, allowing the application processor to start up. PS_HOLD must be set high in 1.5
seconds from the start of STARTUP. The input signal witch activates startup must stay on until PS_HOLD
asserted. If PS_HOLD is not asserted in 1.5 seconds then SWHUTDOWN is initiated. For PWR_ON startup
there is no 1.5 seconds limit.
IDLE:
PMU goes to normal working mode, if PS_HOLD is pulled HIGH after releasing RSTOUT_N. In this mode
all features and control interfaces are available to the user. Chip temperature over TSDH, VDD voltage
below UVLO, PS_HOLD going low for 10 ms or a flag failure in a monitored regulator for 10 ms will cause
the PMU to go to SHUTDOWN state.
SLEEP:
PMU goes to SLEEP state from IDLE state, if SLEEP_N input is pulled low. In this mode PMU current
consumption is minimized to extend device's standby time. Load on regulators and bucks should stay below
5mA each. Conditions of going to SHUTDOWN state are the same as in IDLE state..
SLEEP Mode is controlled by the Serial Interface.
SHUTDOWN:
In this state RSTOUT_N is pulled LOW and all regulators are disabled according to pre-programmed timing
pattern. After this, all registers are reset to default values, and PMU goes to STANDBY state.
SYSTEM RESET:
PMU goes to SYSTEM RESET mode if RSTIN_N input has been pulled low for 33 ms. In this mode
RSTOUT_N output is pulled low and user registers are reset. After a pre-programmed time delay
RSTOUT_N is released, allowing the application processor to start up. During SYSTEM RESET, the
LP3925’s always-on power rail will not drop to zero. If for some reason PS_HOLD is pulled down during
reset, it must come back up within 1.5s of the beginning of system reset. If EN RSTIN SHUTDOWN bit is
high then the reset sequence is similar to shutdown and will startup again only if EN RSTIN STARTUP bit
is high.
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