DS91C180_13 Datasheet, PDF (11/18 Pages) Texas Instruments – 100 MHz M-LVDS Line Driver/Receiver Pair

DS91C180, DS91D180
www.ti.com
SNLS158M – MARCH 2006 – REVISED APRIL 2013
Table 5. DS91C180 Receiver Input Threshold Test Voltages⁽¹⁾
Applied Voltages
V_IA
2.400V
0.000V
3.800V
3.800V
−1.250V
−1.350V
V_IB
0.000V
2.400V
3.650V
3.750V
−1.400V
−1.400V
Resulting Differential Input Voltage
V_ID
2.400V
−2.400V
0.150V
0.050V
0.150V
0.050V
Resulting Common-Mode Input
Voltage
V_IC
1.200V
1.200V
3.725V
3.775V
−1.325V
−1.375V
(1) H — High Level
L — Low Level
Output state assumes that the receiver is enabled (RE = L)
Receiver Output
R
H
L
H
L
H
L
Pin No.
1, 8
2
3
4
5
6, 7
9
10
11
12
13, 14
Name
NC
R
RE
DE
D
GND
Y
Z
B
A
V_CC
PIN DESCRIPTIONS
Description
No connect.
Receiver output pin
Receiver enable pin: When RE is high, the receiver is disabled. When RE is low or open, the
receiver is enabled.
Driver enable pin: When DE is low, the driver is disabled. When DE is high, the driver is enabled.
Driver input pin
Ground pin
Non-inverting driver output pin
Inverting driver output pin
Inverting receiver input pin
Non-inverting receiver input pin
Power supply pin, +3.3V ± 0.3V
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: DS91C180 DS91D180
Submit Documentation Feedback
11