TMS320C6748BZWT4 Datasheet, PDF (108/273 Pages) Texas Instruments – TMS320C6748 Fixed- and Floating-Point DSP

TMS320C6748
SPRS590E – JUNE 2009 – REVISED AUGUST 2013
www.ti.com
5.10 External Memory Interface A (EMIFA)
EMIFA is one of two external memory interfaces supported on the device. It is primarily intended to
support asynchronous memory types, such as NAND and NOR flash and Asynchronous SRAM. However
on this device, EMIFA also provides a secondary interface to SDRAM.
5.10.1 EMIFA Asynchronous Memory Support
EMIFA supports asynchronous:
• SRAM memories
• NAND Flash memories
• NOR Flash memories
The EMIFA data bus width is up to 16-bits.The device supports up to 23 address lines and two external
wait/interrupt inputs. Up to four asynchronous chip selects are supported by EMIFA (EMA_CS[5:2]).
Each chip select has the following individually programmable attributes:
• Data Bus Width
• Read cycle timings: setup, hold, strobe
• Write cycle timings: setup, hold, strobe
• Bus turn around time
• Extended Wait Option With Programmable Timeout
• Select Strobe Option
• NAND flash controller supports 1-bit and 4-bit ECC calculation on blocks of 512 bytes.
5.10.2 EMIFA Synchronous DRAM Memory Support
The device supports 16-bit SDRAM in addition to the asynchronous memories listed in Section 5.10.1. It
has a single SDRAM chip select (EMA_CS[0]). SDRAM configurations that are supported are:
• One, Two, and Four Bank SDRAM devices
• Devices with Eight, Nine, Ten, and Eleven Column Address
• CAS Latency of two or three clock cycles
• Sixteen Bit Data Bus Width
Additionally, the SDRAM interface of EMIFA supports placing the SDRAM in Self Refresh and Powerdown
Modes. Self Refresh mode allows the SDRAM to be put into a low power state while still retaining memory
contents; since the SDRAM will continue to refresh itself even without clocks from the device. Powerdown
mode achieves even lower power, except the device must periodically wake the SDRAM up and issue
refreshes if data retention is required.
Finally, note that the EMIFA does not support Mobile SDRAM devices.
Table 5-17 shows the supported SDRAM configurations for EMIFA.
108 Peripheral Information and Electrical Specifications
Copyright © 2009–2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320C6748