TM4C123GE6PZ Datasheet, PDF (1038/1445 Pages) Texas Instruments – Tiva™ TM4C123GE6PZ Microcontroller

Inter-Integrated Circuit (I²C) Interface
Table 16-4. Inter-Integrated Circuit (I²C) Interface Register Map (continued)
Offset Name
0x018 I2CMMIS
0x01C I2CMICR
0x020 I2CMCR
0x024 I2CMCLKOCNT
0x02C I2CMBMON
0x038 I2CMCR2
I²C Slave
0x800 I2CSOAR
0x804 I2CSCSR
0x808 I2CSDR
0x80C I2CSIMR
0x810 I2CSRIS
0x814 I2CSMIS
0x818 I2CSICR
0x81C I2CSOAR2
0x820 I2CSACKCTL
I²C Status and Control
0xFC0 I2CPP
0xFC4 I2CPC
Type
RO
WO
RW
RW
RO
RW
Reset
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0003
0x0000.0000
Description
I2C Master Masked Interrupt Status
I2C Master Interrupt Clear
I2C Master Configuration
I2C Master Clock Low Timeout Count
I2C Master Bus Monitor
I2C Master Configuration 2
RW
0x0000.0000 I2C Slave Own Address
RO
0x0000.0000 I2C Slave Control/Status
RW
0x0000.0000 I2C Slave Data
RW
0x0000.0000 I2C Slave Interrupt Mask
RO
0x0000.0000 I2C Slave Raw Interrupt Status
RO
0x0000.0000 I2C Slave Masked Interrupt Status
WO
0x0000.0000 I2C Slave Interrupt Clear
RW
0x0000.0000 I2C Slave Own Address 2
RW
0x0000.0000 I2C Slave ACK Control
RO
0x0000.0001 I2C Peripheral Properties
RO
0x0000.0001 I2C Peripheral Configuration
See
page
1049
1050
1051
1053
1054
1055
1056
1057
1059
1060
1061
1062
1063
1064
1065
1066
1067
16.6
Register Descriptions (I²C Master)
The remainder of this section lists and describes the I²C master registers, in numerical order by
address offset.
1038
Texas Instruments-Production Data
June 12, 2014