TLC320AD77 Datasheet, PDF (10/33 Pages) Texas Instruments – 24-Bit 96 kHz Stereo Audio Codec

1.5 Terminal Functions
TERMINAL
I/O
NAME
NO.
DESCRIPTION
AINLM
1
I ADC analog differential negative input, left channel
AINLP
2
I ADC analog differential positive input, left channel
AINRM
28
I ADC analog differential negative input, right channel
AINRP
27
I ADC analog differential positive input, right channel
AOUTL
24
O DAC analog output, left channel
AOUTR
26
O DAC analog output, right channel
AVDD
23
AVSS
7
AVSS(REF)
6
DEM0
18
Analog voltage supply
Analog voltage ground
I Analog ground voltage reference
I De-emphasis selection
DEM1
19
I De-emphasis selection
DVDD
DVSS
LRCLK
17
Digital voltage supply
11
Digital ground
16
I Left/right clock
MCLK
15
I Master clock
MOD0
10
I Serial interface selection
MOD1
9
I Serial interface selection
MOD2
8
I Serial interface selection
PDN_RSTB 20
I Power down/reset
SCLK
14
I Shift or bit clock
SDIN
12
I Serial data DAC input
SDOUT
13
O Serial data ADC output
SPDMODE 21
I Sampling frequency selection
TEST
VCOM
22
Reserved, manufacturing test pin. Test should be connected to DVSS.
25
O Common mode reference, provides a 1.5-V reference voltage (DAC only)
VREFM
4
O ADC/DAC negative reference voltage
VREFP
3
O ADC/DAC positive reference voltage
VRFILT
5
O Voltage reference low pass noise filter
1–4