SBAS052 Datasheet, PDF (10/17 Pages) Texas Instruments – Stereo Audio DIGITAL-TO-ANALOG CONVERTER MPEG2/AC-3 COMPATIBLE

Not Recommended For New Designs
When IZD is “LOW”, the zero detect circuit is off. Under
this condition, no automatic muting will occur if the input
is continuously zero. When IZD is “HIGH”, the zero detect
feature is enabled. If the input data is continuously zero for
65, 536 cycles of BCKIN, the output will be immediately
forced to a bipolar zero state (V_CC/2). The zero detection
feature is used to avoid noise which may occur when the
input is DC. When the output is forced to bipolar zero,
there may be an audible click. PCM1720 allows the zero
detect feature to be disabled so the user can implement
external muting circuit.
ML (pin 4)
MC (pin 5)
MD (pin 6)
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
FIGURE 5. Serial Interface Timing.
ML
t_MCH
t_MCL
MC
t_MCY
t_MLS
t_MLH
t_MLL
MD
t_MDS
t_MDH
MC Pulse Cycle Time
MC Pulse Width LOW
MC Pulse Width HIGH
MD Set-up Time
MC Hold Time
ML Low Level Time
ML Set-up Time
ML Hold Time
: t_MCY
: t_MCL
: t_MCH
: t_MDS
: t_MDH
: t_MLL
: t_MLS
: t_MLH
: 100ns (min)
: 50ns (min)
: 50ns (min)
: 30ns (min)
: 30ns (min)
: 30ns + 1SYSCLK (min)
: 30ns (min)
: 30ns (min)
FIGURE 6. Program Register Input Timing.
1.4V
1.4V
1.4V
®
PCM1720
10