LMH0036 Datasheet, PDF (10/19 Pages) National Semiconductor (TI) – SD SDI Reclocker with 4:1 Input Multiplexer

LMH0036
SNLS254B – MARCH 2008 – REVISED APRIL 2013
SDI
NO DATA
270 MBPS DATA
NO DATA
Lock
Detect
SD
T_ACQ
T₂
T₁
T₁
270 MBPS DATA
NO DATA
T_ACQ
T₂
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T₁
T₁
T_ACQ = Acquisition Time, defined in the AC Electrical Characteristics Table
T₁ = Time from Lock Detect assertion or deassertion until SD output is valid, typically 37ns (one 27 MHz clock period)
T₂ = Time from SDI input change until Lock Detect de-assertion, 1 ms maximum. SD output is not valid during this time.
Figure 4. SDI, Lock Detect, and SD Timing
SCO_EN
Input SCO_EN enables the SCO/SDO2 differential output to function either as a serial data-rate clock or second
serial data output. SCO/SDO2 functions as a serial data-rate clock when SCO_EN is high. This pin has an
internal pull-down device. The default state (low) enables the SCO/SDO2 output as a second serial data output.
CRYSTAL OR EXTERNAL CLOCK REFERENCE
The LMH0036 uses a 27 MHz crystal or external clock signal as a timing reference input. A 27 MHz parallel
resonant crystal and load network may be connected to the XTAL IN/EXT CLK and XTAL OUT pins.
Alternatively, a 27 MHz LVCMOS compatible clock signal may be input to XTAL IN/EXT CLK. Parameters for a
suitable crystal are given in Table 3.
Parameter
Frequency
Frequency Stability
Operating Mode
Load Capacitance
Shunt Capacitance
Series Resistance
Recommended Drive Level
Maximum Drive Level
Operating Temperature Range
Table 3. Crystal Parameters
Value
27 MHz
±100 ppm @ recommended drive level
Fundamental mode, Parallel Resonant
20 pF
7 pF
40Ω max.
100 µW
500 µW
−10°C to +60°C
10
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