DRV10964 Datasheet, PDF (10/27 Pages) Texas Instruments – Three-Phase Sinusoidal Sensorless BLDC Motor Driver

DRV10964
SLDS227 – MARCH 2016
www.ti.com
7.3.4 Motor Frequency Feedback (FG)
During operation of the DRV10964 device, the FG pin provides an indication of the speed of the motor. The
output provided on this pin is configured by applying a logic signal to the FGS pin.
The formula to determine the speed of the motor is:
IF FGS = 0, RPM = (FREQFG × 60)/number of pole pairs
(2)
IF FGS = 1, RPM = (FREQFG × 60 × 3)/number of pole pairs
(3)
During Open Loop Acceleration the FG pin will provide an indication of the frequency of the signal which is
driving the motor. The lock condition of the motor is not known during Open Loop Acceleration so it is possible
that the FG could be toggling during this time even though the motor is not moving.
The FG pin has built in short circuit protection, which limits the current in the event that the pin is shorted to VCC.
The current will be limited to I_{SC_FG}.
7.3.4.1 Tach Feedback During Spin Down
The DRV10964 will provide feedback on the FG pin during spin down of the motor. Figure 7 illustrates the
behavior of the FG output. When DRV10964 PWM input is at 0% DRV10964 will provide the output of the U
phase comparator on the FG pin until the motor speed drops below 10 Hz. When the motor speed is below 10
Hz the device will enter into the Sleep state and the FG output will be held at a constant value based on the last
BEMF zero cross detection.
Closed Loop
Operation
FG = defined by FGS
Command PWM = 0%
Wait for Motor to Stop FG = U to CT BEMF comparator
Speed < 10 Hz
Sleep
FG = 0 or 1 (will not toggle)
Figure 7. TACH Feedback on Spin Down
7.3.5 Lock Detection
When the motor is locked by some external condition the DRV10964 will detect the lock condition and will take
action to protect the motor and the device. The lock condition must be properly detected whether it occurs as a
result of a slowly increasing load or a sudden shock.
The DRV10964 reacts to lock conditions by stopping the motor drive. To stop driving the motor the phase
outputs are placed into a high impedance state. To prevent the current which is flowing in the motor from being
returned to the power supply (VCC) the DRV10964 uses an Ant-Voltage Surge feature. For more information on
this feature, see Anti-Voltage Surge (AVS). After successfully transitioning into a high impedance state as the
result of a lock condition the DRV10964 will attempt to restart the motor after t_{OFF_LOCK} seconds.
The DRV10964 has a comprehensive lock detect function which includes 5 different lock detect schemes. Each
of these schemes detects a particular condition of lock as illustrated in Figure 8.
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