5962-9865201QFA Datasheet, PDF (10/16 Pages) Texas Instruments – DS90LV032AQML 3V LVDS Quad CMOS Differential Line Receiver

DS90LV032AQML
SNLS205A – NOVEMBER 2011 – REVISED APRIL 2013
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3. Shorted Inputs. If a fault condition occurs that shorts the receiver inputs together, thus resulting in a 0V
differential input voltage, the receiver output will remain in a HIGH state. Shorted input fail-safe is not
supported across the common-mode range of the device (GND to 2.4V). It is only supported with inputs
shorted and no external common-mode voltage applied.
External lower value pull up and pull down resistors (for a stronger bias) may be used to boost fail-safe in the
presence of higher noise levels. The pull up and pull down resistors should be in the 5kΩ to 15kΩ range to
minimize loading and waveform distortion to the driver. The common-mode bias point should be set to
approximately 1.2V (less than 1.75V) to be compatible with the internal circuitry.
The footprint of the DS90LV032A is the same as the industry standard 26LS32 Quad Differential (RS-422)
Receiver.
Pin No.
2, 6, 10, 14
1, 7, 9, 15
3, 5, 11, 13
4
12
16
8
Name
R_I+
R_I−
R_O
En
En*
V_CC
Gnd
PIN DESCRIPTIONS
Description
Non-inverting receiver input pin
Inverting receiver input pin
Receiver output pin
Active high enable pin, OR-ed with En*
Active low enable pin, OR-ed with En
Power supply pin, +3.3V ± 0.3V
Ground pin
10
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