TMS570LS0432_15 Datasheet, PDF (1/110 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

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TMS570LS0432, TMS570LS0332
SPNS186B – OCTOBER 2012 – REVISED JUNE 2015
TMS570LS0x32 16- and 32-Bit RISC Flash Microcontroller
1 Device Overview
1.1 Features
1
• High-Performance Automotive-Grade
Microcontroller for Safety-Critical Applications
– Dual CPUs Running in Lockstep
– ECC on Flash and RAM Interfaces
– Built-In Self-Test for CPU and On-Chip RAMs
– Error Signaling Module With Error Pin
– Voltage and Clock Monitoring
• ARM^® Cortex^®-R4 32-Bit RISC CPU
– Efficient 1.66 DMIPS/MHz With 8-Stage Pipeline
– 8-Region Memory Protection Unit (MPU)
– Open Architecture With Third-Party Support
• Operating Conditions
– 80-MHz System Clock
– Core Supply Voltage (V_CC): 1.2-V Nominal
– I/O Supply Voltage (V_CCIO): 3.3-V Nominal
– ADC Supply Voltage (V_CCAD): 3.3-V Nominal
• Integrated Memory
– Up to 384KB of Program Flash With ECC
– 32KB of RAM With ECC
– 16KB of Flash for Emulated EEPROM With
ECC
• Hercules™ Common Platform Architecture
– Consistent Memory Map Across Family
– Real-Time Interrupt (RTI) Timer (OS Timer)
– 96-Channel Vectored Interrupt Module (VIM)
– 2-Channel Cyclic Redundancy Checker (CRC)
• Frequency-Modulated Phase-Locked Loop
(FMPLL) With Built-In Slip Detector
• IEEE 1149.1 JTAG Boundary Scan and ARM
CoreSight™ Components
• Advanced JTAG Security Module (AJSM)
• Multiple Communication Interfaces
– Two CAN Controllers (DCANs)
• DCAN1 - 32 Mailboxes With Parity
Protection
• DCAN2 - 16 Mailboxes With Parity
Protection
• Compliant to CAN Protocol Version 2.0B
– Multibuffered Serial Peripheral Interface
(MibSPI) Module
• 128 Words With Parity Protection
– Two Standard Serial Peripheral Interface (SPI)
Modules
– UART (SCI) Interface With Local Interconnect
Network (LIN 2.1) Interface Support
• Next Generation High-End Timer (N2HET) Module
– Up to 19 Programmable Pins
– 128-Word Instruction RAM With Parity
Protection
– Includes Hardware Angle Generator
– Dedicated High-End Timer Transfer Unit (HTU)
With MPU
• Enhanced Quadrature Encoder Pulse (eQEP)
Module
– Motor Position Encoder Interface
• 12-Bit Multibuffered Analog-to-Digital Converter
(ADC) Module
– 16 Channels
– 64 Result Buffers With Parity Protection
• Up to 45 General-Purpose Input/Output (GPIO)
Pins
– 8 Dedicated Interrupt-Capable GPIO Pins
• Package
– 100-Pin Quad Flatpack (PZ) [Green]
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.