SRC4382_14 Datasheet, PDF (1/84 Pages) Texas Instruments – Two-Channel, Asynchronous Sample Rate Converter with Integrated Digital Audio Interface Receiver and Transmitter

BurrĆBrown Products
from Texas Instruments
SRC4382
SRC4382
SBFS030C – JANUARY 2006 – REVISED SEPTEMBER 2007
Two-Channel, Asynchronous Sample Rate Converter with
Integrated Digital Audio Interface Receiver and Transmitter
FEATURES
1
•234 Two-Channel Asynchronous Sample Rate
Converter (SRC)
– Dynamic Range with –60dB Input
(A-Weighted): 128dB typical
– Total Harmonic Distortion and Noise
(THD+N) with Full-Scale Input: –125dB
typical
– Supports Audio Input and Output Data
Word Lengths Up to 24 Bits
– Supports Input and Output Sampling
Frequencies Up to 216kHz
– Automatic Detection of the Input-to-Output
Sampling Ratio
– Wide Input-to-Output Conversion Range:
16:1 to 1:16 Continuous
– Excellent Jitter Attenuation Characteristics
– Digital De-Emphasis Filtering for 32kHz,
44.1kHz, and 48kHz Input Sampling Rates
– Digital Output Attenuation and Mute
Functions
– Output Word Length Reduction
– Status Registers and Interrupt Generation
for Sampling Ratio and Ready Flags
• Digital Audio Interface Transmitter (DIT)
– Supports Sampling Rates Up to 216kHz
– Includes Differential Line Driver and
CMOS Buffered Outputs
– Block-Sized Data Buffers for Both Channel
Status and User Data
– Status Registers and Interrupt Generation
for Flag and Error Conditions
• User-Selectable Serial Host Interface: SPI or
Philips I²C™
– Provides Access to On-Chip Registers and
Data Buffers
U.S. Patent No. 7,262,716
• Digital Audio Interface Receiver (DIR)
– PLL Lock Range Includes Sampling Rates
from 20kHz to 216kHz
– Includes Four Differential Input Line
Receivers and an Input Multiplexer
– Bypass Multiplexer Routes Line Receiver
Outputs to Line Driver and Buffer Outputs
– Block-Sized Data Buffers for Both Channel
Status and User Data
– Automatic Detection of Non-PCM Audio
Streams (DTS CD/LD and IEC 61937
formats)
– Audio CD Q-Channel Sub-Code Decoding
and Data Buffer
– Status Registers and Interrupt Generation
for Flag and Error Conditions
– Low Jitter Recovered Clock Output
• Two Audio Serial Ports (Ports A and B)
– Synchronous Serial Interface to External
Signal Processors, Data Converters, and
Logic
– Slave or Master Mode Operation with
Sampling Rates up to 216kHz
– Supports Left-Justified, Right-Justified, and
Philips I²S™ Data Formats
– Supports Audio Data Word Lengths Up to
24 Bits
• Four General-Purpose Digital Outputs
– Multifunction Programmable Via Control
Registers
• Extensive Power-Down Support
– Functional Blocks May Be Disabled
Individually When Not In Use
• Operates From +1.8V Core and +3.3V I/O
Power Supplies
• Small TQFP-48 Package, Compatible with the
SRC4392 and DIX4192
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Dolby is a registered trademark of Dolby Laboratories.
2
I2C, I2S are trademarks of Koninklijke Philips Electronics N.V.
3
All other trademarks are the property of their respective owners.
4
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated