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BQ4017_14 Datasheet, PDF (1/14 Pages) Texas Instruments – 2048Kx8 Nonvolatile SRAM
Not Recommended for new Designs
bq4017/bq4017Y
2048Kx8 Nonvolatile SRAM
Features
➤ Data retention in the absence of
power
➤ Automatic write-protection dur-
ing power-up/power-down cycles
➤ Conventional SRAM operation;
unlimited write cycles
➤ 5-year minimum data retention
in absence of power
➤ Battery internally isolated until
power is applied
General Description
The CMOS bq4017 is a nonvolatile
16,777,216-bit static RAM organized
as 2,097,152 words by 8 bits. The
integral control circuitry and lith-
ium energy source provide reliable
nonvolatility coupled with the un-
limited write cycles of standard
SRAM.
The control circuitry constantly
monitors the single 5V supply for an
out-of-tolerance condition. When VCC
falls out of tolerance, the SRAM is
unconditionally write-protected to
prevent an inadvertent write opera-
tion.
At this time the integral energy
source is switched on to sustain the
memory until after VCC returns valid.
The bq4017 uses extremely low
standby current CMOS SRAMs, cou-
pled with small lithium coin cells to
provide nonvolatility without long
write-cycle times and the write-cycle
limitations associated with EE-
PROM.
The bq4017 has the same interface
as industry-standard SRAMs and
requires no external circuitry.
Pin Connections
NC 1
A20 2
A18 3
A16 4
A14 5
A12 6
A7 7
A6 8
A5 9
A4 10
A3 11
A2 12
A1 13
A0 14
DQ0 15
DQ1 16
DQ2 17
VSS 18
36 VCC
35 A19
34 NC
33 A15
32 A17
31 WE
30 A13
29 A8
28 A9
27 A11
26 OE
25 A10
24 CE
23 DQ7
22 DQ6
21 DQ5
20 DQ4
19 DQ3
36-Pin DIP Module
PN401701.eps
Pin Names
A0–A20 Address inputs
DQ0–DQ7 Data input/output
CE
Chip enable input
OE
Output enable input
WE
Write enable input
VCC
Supply voltage input
VSS
Ground
NC
No connect
Block Diagram
Selection Guide
Part
Number
bq4017MC -70
Maximum
Access
Time (ns)
70
Negative
Supply
Tolerance
-5%
Part
Number
bq4017YMC -70
Maximum
Access
Time (ns)
70
Negative
Supply
Tolerance
-10%
5/95
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