SN74AUP2G126 Datasheet, PDF (9/16 Pages) Texas Instruments – LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS

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SN74AUP2G126
LOW-POWER DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCES687B – JANUARY 2007 – REVISED JANUARY 2008
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
C_L
(see Note A)
1 MW
LOAD CIRCUIT
V_CC = 0.8 V
V_CC = 1.2 V
± 0.1 V
V_CC = 1.5 V
± 0.1 V
V_CC = 1.8 V
± 0.15 V
V_CC = 2.5 V
± 0.2 V
V_CC = 3.3 V
± 0.3 V
C_L 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
V_M
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_CC/2
V_I
V_CC
V_CC
V_CC
V_CC
V_CC
V_CC
V_I
Input
V_M
V_M
0V
t_PLH
Output
V_M
t_PHL
V_M
V_OH
V_OL
t_PHL
t_PLH
Output
V_OH
V_M
V_M
V_OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Input
Timing Input
Data Input
t_w
V_CC/2
V_CC
V_CC/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
V_CC/2
V_CC
0V
t_su
V_CC/2
t_h
V_CC
V_CC/2
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
NOTES: A. C_L includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, Z_O = 50 W, t_r/t_f = 3 ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. t_PLH and t_PHL are the same as t_pd.
E. All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
Copyright © 2007–2008, Texas Instruments Incorporated
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