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SM320VC33 Datasheet, PDF (9/54 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR
memory map
0h
03Fh
040h
Reset, Interrupt, Trap Vector, and
Reserved Locations (64)
(External STRB Active)
SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
0h
Reserved for Bootloader
Operations
External
STRB Active
(8M Words - 64 Words)
FFFh
1000h
Boot 1
400000h Boot 2
External
STRB
Active
(8M Words -
4K Words)
7FFFFFh
800000h
803FFFh
804000h
807FFFh
808000h
8097FFh
809800h
809BFFh
809C00h
RAM Block 2
(16K Words Internal)
RAM Block 3
(16K Words Internal)
Peripheral Bus
Memory-Mapped Registers
(6K Words Internal)
RAM Block 0
(1K Words Internal)
RAM Block 1
(1K Words Internal)
809FFFh
80A000h
FFFFFFh
External
STRB Active
(8M Words - 40K Words)
(a) Microprocessor Mode
7FFFFFh
800000h
803FFFh
804000h
807FFFh
808000h
8097FFh
809800h
809BFFh
809C00h
RAM Block 2
(16K Words Internal)
RAM Block 3
(16K Words Internal)
Peripheral Bus
Memory-Mapped Registers
(6K Words Internal)
RAM Block 0
(1K Words Internal)
RAM Block 1
(1K Words Internal)
809FC0h
809FC1h
809FFFh
User-Program Interrupt
and Trap Branch Table
63 Words
80A000h
FFF000h
FFFFFFh
Boot 3
External
STRB Active
(8M Words -
40K Words)
(b) Microcomputer/Bootloader Mode
NOTE A: STRB is active over all external memory ranges. PAGE0 to PAGE3 are configured as external bus strobes. These are simple
decoded strobes that have no configuration registers and are active only during external bus activity over the following ranges:
Name
PAGE0
PAGE1
PAGE2
PAGE3
STRB
Active range
0000000h – 03FFFFFh
0400000h – 07FFFFFh
0800000h – 0BFFFFFh
0C00000h – 0FFFFFFh
0000000h – 0FFFFFFh
Figure 1. SM/SMJ320VC33 Memory Maps
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