SM320VC33 Datasheet, PDF (4/54 Pages) Texas Instruments – DIGITAL SIGNAL PROCESSOR

SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
GNM Terminal Assignments^† (Sorted by Signal Name)
SIGNAL
NAME
PIN
NUMBER
SIGNAL
NAME
PIN
NUMBER
SIGNAL
NAME
PIN
NUMBER
SIGNAL
NAME
PIN
NUMBER
A0
J2
D0
G12
M1
R/W
L4
A1
K2
D1
G10
N1
RDY
M5
A2
K1
D2
F13
N4
RESET
B7
A3
J4
D3
G11
N7
RSV0
B4
A4
H4
D4
H10
M8
RSV1
D5
A5
H3
D5
H13
N12
SHZ
D7
A6
H1
D6
H12
DV_DD
L13
STRB
M4
A7
G4
D7
J10
H11
TCK
F10
A8
G1
D8
J11
F11
TCLK0
C10
A9
G2
D9
J12
B12
TCLK1
A11
A10
F3
D10
K13
A10
TDI
E11
A11
F4
D11
K12
A6
TDO
D13
A12
F2
D12
K10
A1
TMS
E10
A13
E1
D13
M13
DX0
A12
TRST
C13
A14
E2
D14
L11
EDGEMODE
A7
B1
A15
E4
D15
L12
EMU0
F12
D1
A16
C1
D16
M12
EMU1
E12
G3
A17
C2
D17
L10
EXTCLK
C6
J1
A18
D3
D18
K9
FSR0
C12
L2
A19
C3
D19
N11
FSX
D10
M3
A20
B2
D20
M11
H1
L3
M6
A21
D4
D21
M10
H3
N2
L7
A22
A2
D22
K8
HOLD
N5
N10
A23
B3
D23
N9
HOLDA
K5
V_SS
N13
CLKMD0
C5
D24
M9
IACK
K4
K11
CLKMD1
B5
D25
L8
INT0
C8
G13
CLKR0
B13
D26
N8
INT1
B9
E13
CLKX0
B11
D27
M7
INT2
D8
A13
E3
D28
K7
INT3
A9
C11
J3
D29
L6
MCBL/MP
B8
C9
L5
D30
N6
PAGE0
M2
C7
L9
CV_DD
J13
D31
DR0
K6
PAGE1
N3
D11
PAGE2
L1
C4
XF0
B10
D12
D2
PAGE3
K3
XF1
D9
A8
DV_DD
F1
PLLV_DD‡
A5
XIN
B6
A3
H2
PLLV_SS‡
A4
XOUT
D6
† _{DVDD is the power supply for the I/O pins while CVDD is the power supply for the core CPU. VSS is the ground for both the I/O pins and the core}
CPU.
‡ _{PLLVDD and PLLVSS are isolated PLL supply pins that should be externally connected to CVDD and VSS, respectively.}
4
• POST OFFICE BOX 1443 HOUSTON, TEXAS 77251-1443