 English |
|
|
|
|
|
|
|
| NTE4052BT Datasheet, PDF (9/28 Pages) Texas Instruments – Data sheet acquired from Harris Semiconductor | |||
| |||
| ◁ |
CD4051B, CD4052B, CD4053B
Test Circuits and Waveforms
VDD = 15V
VDD = 7.5V
VDD = 5V
VDD = 5V
7.5V
16
VSS = 0V
5V
16
VSS = 0V
VEE = 0V
VSS = 0V
7
8
(A)
VEE = -7.5V
7
8
(B)
VEE = -10V
NOTE: The ADDRESS (digital-control inputs) and INHIBIT logic levels
are: â0â = VSS and â1â = VDD. The analog signal (through the TG) may
swing from VEE to VDD.
16
7
8
(C)
FIGURE 9. TYPICAL BIAS VOLTAGES
5V
VSS = 0V
VEE = -5V
16
7
8
(D)
10%
tr = 20ns
90%
50%
90%
50%
90%
50%
TURN-ON TIME
10%
TURN-OFF TIME
tf = 20ns
10%
10%
FIGURE 10. WAVEFORMS, CHANNEL BEING TURNED ON
(RL = 1kâ¦)
10%
tr = 20ns
90%
50%
90%
50%
tf = 20ns
10%
tPHZ
90%
TURN-OFF TIME
10%
TURN-ON
TIME
FIGURE 11. WAVEFORMS, CHANNEL BEING TURNED OFF
(RL = 1kâ¦)
VDD
VDD
VDD
1
16
2
15
3
14 IDD
4
13
5
12
6
11
7
10
8
9
CD4051
1
16
2
15
3
14
IDD
4
13
5
12
6
11
7
10
8
9
CD4052
1
16
2
15
3
14
4
13
IDD
5
12
6
11
7
10
8
9
CD4053
FIGURE 12. OFF CHANNEL LEAKAGE CURRENT - ANY CHANNEL OFF
9
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese