NTE4052BT Datasheet, PDF (5/28 Pages) Texas Instruments – Data sheet acquired from Harris Semiconductor

CD4051B, CD4052B, CD4053B
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V+ to V-)
Voltages Referenced to V_SS Terminal . . . . . . . . . . . -0.5V to 20V
DC Input Voltage Range . . . . . . . . . . . . . . . . . . -0.5V to V_DD +0.5V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . ±10mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55^oC to 125^oC
Package Thermal Impedance, θ_JA (see Note 1):
E (PDIP) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67^oC/W
M (SOIC) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73^oC/W
NS (SOP) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64^oC/W
PW (TSSOP) package . . . . . . . . . . . . . . . . . . . . . . . . . . 108^oC/W
Maximum Junction Temperature (Ceramic Package) . . . . . . . . .175^oC
Maximum Junction Temperature (Plastic Package) . . . . . . . .150^oC
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .265^oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
Electrical Specifications
Common Conditions Here: If Whole Table is For the Full Temp. Range, V_SUPPLY = ±5V, A_V = +1,
R_L = 100Ω, Unless Otherwise Specified (Note 3)
CONDITIONS
LIMITS AT INDICATED TEMPERATURES (^oC)
25
PARAMETER
V_IS (V) V_EE (V) V_SS (V) V_DD (V) -55
-40
85
125 MIN TYP
SIGNAL INPUTS (V_IS) AND OUTPUTS (V_OS)
Quiescent Device
Current, I_DD Max
-
-
-
5
5
5
150 150
-
0.04
-
-
-
10
10
10 300 300
-
0.04
MAX
5
10
-
-
-
15
20
20 600 600
-
0.04
20
-
-
-
20
100 100 3000 3000
-
0.08
100
Drain to Source ON
-
0
0
5
800 850 1200 1300
-
470
1050
Resistance r_ON Max
0 ≤ V_IS ≤ V_DD
-
0
0
10
310 330 520 550
-
180
400
-
0
0
15
200 210 300 320
-
125
240
Change in ON
-
0
0
5
-
-
-
-
-
15
-
Resistance (Between
Any Two Channels),
-
0
0
10
-
-
-
-
-
10
-
∆r_ON
-
0
0
15
-
-
-
-
-
5
-
OFF Channel Leakage
-
Current: Any Channel
OFF (Max) or ALL
Channels OFF (Common
OUT/IN) (Max)
0
0
18 ±100 (Note 2) ±1000 (Note 2) -
±0.01 ±100
(Note 2)
Capacitance:
Input, C_IS
Output, C_OS
CD4051
-
-5
5-
5
-
-
-
-
-
5
-
-
-
-
-
-
30
-
CD4052
-
-
-
-
-
18
-
CD4053
-
-
-
-
-
9
-
Feedthrough
C_IOS
Propagation Delay Time
(Signal Input to Output
V_DD
R_L = 200kΩ,
C_L = 50pF,
t_r, t_f = 20ns
-
-
-
-
-
0.2
-
5
-
-
-
-
-
30
60
10
-
-
-
-
-
15
30
15
-
-
-
-
-
10
20
UNITS
µA
µA
µA
µA
Ω
Ω
Ω
Ω
Ω
Ω
nA
pF
pF
pF
pF
pF
ns
ns
ns
5