NTE4052BT Datasheet, PDF (6/28 Pages) Texas Instruments – Data sheet acquired from Harris Semiconductor

CD4051B, CD4052B, CD4053B
Electrical Specifications
Common Conditions Here: If Whole Table is For the Full Temp. Range, V_SUPPLY = ±5V, A_V = +1,
R_L = 100Ω, Unless Otherwise Specified (Continued) (Note 3)
CONDITIONS
LIMITS AT INDICATED TEMPERATURES (^oC)
25
PARAMETER
V_IS (V) V_EE (V) V_SS (V) V_DD (V) -55
-40
CONTROL (ADDRESS OR INHIBIT), V_C
Input Low Voltage, V_IL, V_IL = V_DD V_EE = V_SS,
5
Max
through
1kΩ ;
R_L = 1kΩ to V_SS,
I_IS < 2µA on All
10
V_IH = V_DD OFF Channels
15
through
Input High Voltage, V_IH, _1kΩ
5
Min
10
1.5 1.5
3
3
4
4
3.5 3.5
7
7
85 125 MIN TYP
1.5 1.5
-
-
3
3
-
-
4
4
-
-
3.5
3.5
3.5
-
7
7
7
-
MAX
1.5
3
4
-
-
Input Current, I_IN (Max) V_IN = 0, 18
Propagation Delay Time:
Address-to-Signal
t_r, t_f = 20ns, 0
OUT (Channels ON or C_L = 50pF,
OFF) See Figures 10, R_L = 10kΩ
0
11, 14
0
15
11
11
11
11
11
-
-
18
±0.1 ±0.1 ±1
±1
-
± 10^-5
± 0.1
0
5
-
-
-
-
-
450
720
0
10
-
-
-
-
-
160
320
0
15
-
-
-
-
-
120
240
-5
0
5
-
-
-
-
-
225
450
Propagation Delay Time:
Inhibit-to-Signal OUT t_r, t_f = 20ns, 0
(Channel Turning ON) C_L = 50pF,
See Figure 11
R_L = 1kΩ
0
0
0
5
-
-
-
-
-
400
720
0
10
-
-
-
-
-
160
320
0
15
-
-
-
-
-
120
240
-10
0
5
-
-
-
-
-
200
400
Propagation Delay Time:
Inhibit-to-Signal OUT t_r, t_f = 20ns, 0
(Channel Turning
C_L = 50pF,
OFF) See Figure 15 R_L = 10kΩ
0
0
0
5
-
-
-
-
-
200
450
0
10
-
-
-
-
-
90
210
0
15
-
-
-
-
-
70
160
-10
0
5
-
-
-
-
-
130
300
Input Capacitance, C_IN
(Any Address or Inhibit
Input)
-
-
-
-
-
5
7.5
NOTE:
2. Determined by minimum feasible leakage measurement for automatic testing.
UNITS
V
V
V
V
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
Electrical Specifications
TEST CONDITIONS
PARAMETER
V_IS (V) V_DD (V) R_L (kΩ)
Cutoff (-3dB) Frequency Chan- 5 (Note 3)
10
nel ON (Sine Wave Input)
V_EE = V_SS,
1
V_OS at Common OUT/IN
20Log-^V-_V---^O-_I--_S-^S-- = –3dB
V_OS at Any Channel
CD4053
CD4052
CD4051
LIMITS
TYP
30
25
20
60
UNITS
MHz
MHz
MHz
MHz
6