DS16EV5110SQ Datasheet, PDF (9/24 Pages) Texas Instruments – DS16EV5110 Video Equalizer (3D+C) for DVI, HDMI Sink-Side Applications

DS16EV5110
www.ti.com
SNLS249M – FEBRUARY 2007 – REVISED APRIL 2013
9. The Device drives the 8-bit data value (register contents).
10. The Host drives a NACK bit “1”indicating end of the READ transfer.
11. The Host drives a STOP condition.
12. The Host de-selects the device by driving its SMBus CS signal Low.
The READ transaction is completed, the bus goes IDLE and communication with other SMBus devices may now
occur.
See Table 1 for more information.
Table 1. SMBus Register Descriptions⁽¹⁾
Name
Status
Status
Status
Internal
Enable/
Individual
Channel
Boost
Control
for
C_IN±,
D_IN0±
Individual
Channel
Boost
Control
for
D_IN1±,
D_IN2±
Signal
Detect ON
(SD_ON)
Address
0x00
0x01
0x02
0x03
0x04
0x05
Default
0x00
0x00
0x00
0x77
0x77
0x00
Type
RO
RO
RO
RW
RW
RW
Bit 7
Bit 6
Bit 5
ID Revision
Reserved Boost 1
Reserved Boost 3
EN (Int.)
0:Enable
1:Disable
(D_IN0±)
Boost Control
(BC for CH0)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
EN (Int.)
0:Enable
1:Disable
(D_IN2±)
Boost Control
(BC for CH2)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
Reserved
Bit 4
Signal
0x06
Detect OFF
(SD_OFF)
0x00
RW Reserved
SMBus
orCMOS
Control for
EN
Output
Level
0x07
0x08
0x00
RW Reserved
0x78
RW Reserved
Bit 3
Reserved
EN
Reserved
EN (Int.)
0:Enable
1:Disable
(C_IN±)
Bit 2
Reserved
Reserved
Boost 2
Reserved
Bit 1
Reserved
Bit 0
SD
EN (Int.)
0:Enable
1:Disable
(D_IN1±)
Boost Control
(BC for CH1)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
Threshold (mV)
00: 70 (Default)
01: 55
10: 90
11: 75
Threshold (mV)
00: 40 (Default)
01: 30
10: 55
11: 45
SMBus
Enable
0: Disable
1: Enable
Output Level:
00: 540 mVp-p
01: 770 mVp-p
10: 1000 mVp-p
11: 1200 mVp-p
Reserved
(1) Note: RO = Read Only, RW = Read/Write
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