DS16EV5110SQ Datasheet, PDF (6/24 Pages) Texas Instruments – DS16EV5110 Video Equalizer (3D+C) for DVI, HDMI Sink-Side Applications

DS16EV5110
SNLS249M – FEBRUARY 2007 – REVISED APRIL 2013
Electrical Characteristics — System Management Bus Interface⁽¹⁾⁽²⁾
Over recommended operating supply and temperature ranges unless other specified.
Symbol
Parameter
Conditions
Min
System Bus Interface — DC Specifications
V_IL
Data, Clock Input Low Voltage
V_IH
Data, Clock Input High Voltage
2.8
I_PULLUP
Current through pull-up resistor or current
source
VOL = 0.4V
V_DD
Nominal Bus Voltage
I_LEAK-Bus
Input Leakage per bus segment
I_LEAK-Pin
Input Leakage per device pin
C_I
Capacitance for SDA and SDC
R_TERM
Termination Resistance
System Bus Interface Timing Specification
FSMB
Bus Operating Frequency
See ⁽³⁾
See ^{(3) (4)}
V_DD3.3 ^{(3) (4) (5)}
See ⁽⁶⁾
3.0
—200
10
TBUF
Bus Free Time Between Stop and Start
Condition
4.7
THD:STA
Hold Time After (Repeated) Start Condition.
First CLK generated after this period.
At I_PULLUP, Max
4.0
TSU:STA
Repeated Start Condition Setup Time
4.7
TSU:STO
Stop Condition Setup Time
4.0
THD:DAT
Data Hold Time
300
TSU:DAT
Data Setup Time
250
T_TIMEOUT
Detect Clock Low Timeout
See ⁽⁶⁾
25
T_LOW
Clock Low Period
4.7
T_HIGH
Clock High Period
See ⁽⁶⁾
4.0
T_LOW:SEXT Cumulative Clock Low Extend Time (Slave
Device)
See ⁽⁶⁾
t_F
Clock/Data Fall Time
See ⁽⁶⁾
t_R
Clock/Data Rise Time
See ⁽⁶⁾
t_POR
Time in which a device must be operational
See ⁽⁶⁾
after power-on reset
Typ
10
—15
1000
www.ti.com
Max
0.8
V_DD
3.6
+200
10
100
35
50
2
300
1000
500
Units
V
V
mA
V
µA
µA
pF
Ω
kHz
µs
µs
µs
µs
ns
ns
ms
µs
µs
ms
ns
ns
ms
(1) Typical values represent most likely parametric norms at V_DD = 3.3V, T_A = 25°C, and at the Recommended Operation Conditions at the
time of product characterization and are not ensured.
(2) The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes.
(3) Recommended value. Parameter not tested in production.
(4) Recommended maximum capacitance load per bus segment is 400pF.
(5) Maximum termination voltage should be identical to the device supply voltage.
(6) Compliant to SMBus 2.0 physical layer specification. See System Management Bus (SMBus) Specification Version 2.0, section 3.1.1
SMBus common AC specifications for details.
6
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