TMS320C6454 Datasheet, PDF(89/225 Page) Texas Instruments – Fixed-Point Digital Signal Processor

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TMS320C6454 Datasheet, PDF (89/225 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

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TMS320C6454

Fixed-Point Digital Signal Processor

SPRS311A â APRIL 2006 â REVISED DECEMBER 2006

Table 5-9. Megamodule L1/L2 Memory Protection Registers (continued)

HEX ADDRESS RANGE

0184 AD08

0184 AD0C

0184 AD10

0184 AD14

0184 AD18 - 0185 FFFF

ACRONYM

L1DMPLK2

L1DMPLK3

L1DMPLKCMD

L1DMPLKSTAT

-

REGISTER NAME

L1D memory protection lock key bits [95:64]

L1D memory protection lock key bits [127:96]

L1D memory protection lock key command register

L1D memory protection lock key status register

Reserved

Table 5-10. CPU Megamodule Bandwidth Management Registers

HEX ADDRESS RANGE

0182 0200

0182 0204

0182 0208

0182 020C

0182 0210 - 0182 02FF

0184 1000

0184 1004

0184 1008

0184 100C

0184 1010 - 0184 103F

0184 1040

0184 1044

0184 1048

0184 104C

ACRONYM

REGISTER NAME

EMCCPUARBE EMC CPU Arbitration Control Register

EMCIDMAARBE EMC IDMA Arbitration Control Register

EMCSDMAARBE EMC Slave DMA Arbitration Control Register

EMCMDMAARBE EMC Master DMA Arbitration Control Resgiter

-

Reserved

L2DCPUARBU L2D CPU Arbitration Control Register

L2DIDMAARBU L2D IDMA Arbitration Control Register

L2DSDMAARBU L2D Slave DMA Arbitration Control Register

L2DUCARBU L2D User Coherence Arbitration Control Resgiter

-

Reserved

L1DCPUARBD L1D CPU Arbitration Control Register

L1DIDMAARBD L1D IDMA Arbitration Control Register

L1DSDMAARBD L1D Slave DMA Arbitration Control Register

L1DUCARBD L1D User Coherence Arbitration Control Resgiter

Table 5-11. Device Configuration Registers (Chip-Level Registers)

HEX ADDRESS RANGE

02A8 0000

02A8 0004

02A8 0008

02A8 000C - 02AB FFFF

02AC 0000

02AC 0004

02AC 0008

02AC 000C

02AC 0010

02AC 0014

02AC 0018

02AC 001C - 02AC 001F

02AC 0020

02AC 0024 - 02AC 002B

02AC 002C

02AC 0030 - 02AC 0053

02AC 0054

02AC 0058

ACRONYM

DEVSTAT

PRI_ALLOC

JTAGID

-

-

PERLOCK

PERCFG0

-

-

PERSTAT0

PERSTAT1

-

EMACCFG

-

PERCFG1

-

EMUBUFPD

-

REGISTER NAME

Device Status Register

Priority Allocation Register

JTAG and BSDL Identification

Register

Reserved

Reserved

Peripheral Lock Register

Peripheral Configuration Register 0

Reserved

Reserved

Peripheral Status Register 0

Peripheral Status Register 1

Reserved

EMAC Configuration Register

Reserved

Peripheral Configuration Register 1

Reserved

Emulator Buffer Powerdown Register

Reserved

COMMENTS

Read-only. Provides status of the

user's device configuration on reset.

Sets priority for Master peripherals

Read-only. Provides 32-bit JTAG ID of

the device.

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C64x+ Megamodule

89

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