TMS320C6454 Datasheet, PDF (1/225 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

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TMS320C6454
Fixed-Point Digital Signal Processor
SPRS311A – APRIL 2006 – REVISED DECEMBER 2006
1 TMS320C6454 Fixed-Point Digital Signal Processor
1.1 Features
• High-Performance Fixed-Point DSP (C6454)
– 1.39-, 1.17-, and 1-ns Instruction Cycle Time
– 720-MHz, 850-MHz, and 1-GHz Clock Rate
– Eight 32-Bit Instructions/Cycle
– 8000 MIPS/MMACS (16-Bits)
– Commercial Temperature [0°C to 90°C]
• TMS320C64x+™ DSP Core
– Dedicated SPLOOP Instruction
– Compact Instructions (16-Bit)
– Instruction Set Enhancements
– Exception Handling
• TMS320C64x+ Megamodule L1/L2 Memory
Architecture:
– 256K-Bit (32K-Byte) L1P Program Cache
[Direct Mapped]
– 256K-Bit (32K-Byte) L1D Data Cache
[2-Way Set-Associative]
– 8M-Bit (1048K-Byte) L2 Unified Mapped
RAM/Cache [Flexible Allocation]
– 256K-Bit (32K-Byte) L2 ROM
– Time Stamp Counter
• Endianess: Little Endian, Big Endian
• 64-Bit External Memory Interface (EMIFA)
– Glueless Interface to Asynchronous
Memories (SRAM, Flash, and EEPROM) and
Synchronous Memories (SBSRAM and ZBT
SRAM)
– Supports Interface to Standard Sync
Devices and Custom Logic (FPGA, CPLD,
ASICs, etc.)
– 32M-Byte Total Addressable External
Memory Space
• 32-Bit DDR2 Memory Controller (DDR2-533
SDRAM)
• EDMA3 Controller (64 Independent Channels)
• 32-/16-Bit Host-Port Interface (HPI)
• 32-Bit 33-/66-MHz, 3.3-V Peripheral Component
Interconnect (PCI) Master/Slave Interface
Conforms to PCI Specification 2.3
• One Inter-Integrated Circuit (I²C) Bus
• Two McBSPs
• 10/100/1000 Mb/s Ethernet MAC (EMAC)
– IEEE 802.3 Compliant
– Supports Multiple Media Independent
Interfaces (MII, GMII, RMII, and RGMII)
– 8 Independent Transmit (TX) and
8 Independent Receive (RX) Channels
• Two 64-Bit General-Purpose Timers,
Configurable as Four 32-Bit Timers
• 16 General-Purpose I/O (GPIO) Pins
• System PLL and PLL Controller
• Secondary PLL and PLL Controller, Dedicated
to EMAC and DDR2 Memory Controller
• IEEE-1149.1 (JTAG™)
Boundary-Scan-Compatible
• 697-Pin Ball Grid Array (BGA) Package
(ZTZ or GTZ Suffix), 0.8-mm Ball Pitch
• 0.09-µm/7-Level Cu Metal Process (CMOS)
• 3.3-/1.8-/1.5-V I/Os, 1.25-/1.2-V Internal
• Pin-Compatible with the TMS320C6455
Fixed-Point Digital Signal Processor
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