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THS7376 Datasheet, PDF (8/61 Pages) Texas Instruments – 4-Channel Video Amplifier with One SD and Three HD 8th-Order Filters with 6-dB Gain
THS7376
SBOS692 – JUNE 2013
www.ti.com
ELECTRICAL CHARACTERISTICS: VS+ = +5 V (continued)
At TA = +25°C, RL = 150 Ω to GND, CLOAD = 5 pF, filter mode, and dc-coupled input and output, unless otherwise noted.
See Figure 123 and Figure 124.
PARAMETER
TEST CONDITIONS
TEST
LEVEL
MIN
TYP
MAX UNITS
(1)
OUTPUT CHARACTERISTICS
High output voltage swing
Low output voltage swing
Output current (sourcing)
Output current (sinking)
POWER SUPPLY
RL = 150 Ω to +2.5 V
RL = 150 Ω to GND
RL = 75 Ω to +2.5 V
RL = 75 Ω to GND
RL = 150 Ω to +2.5 V (VIN = –0.2 V)
RL = 150 Ω to GND (VIN = –0.2 V)
RL = 75 Ω to +2.5 V (VIN = –0.2 V)
RL = 75 Ω to GND (VIN = –0.2 V)
RL = 10 Ω to +2.5 V
RL = 10 Ω to +2.5 V
4.85
V
C
4.4
4.75
V
A
4.75
V
C
4.5
V
C
0.09
V
C
0.05
0.1 V
A
0.15
V
C
0.05
V
C
150
mA
C
140
mA
C
Operating voltage
2.85
5
5.5 V
B
Total quiescent current,
no load
PSRR Power-supply rejection ratio
LOGIC CHARACTERISTICS(6)
VIN = 0 V, enabled, VDISABLE = 0 V
VIN = 0 V, disabled, VDISABLE = 3 V
At dc
27.2
32.6
39 mA
A
0.1
10 µA
A
53
dB
C
VIH
High-level input voltage
VIL
Low-level input voltage
IIH
High-level input current
IIL
Low-level input current
tdis
Disable time
ten
Enable time
HD bypass and
filter switch time
Disabled or HD bypass engaged
Enabled or HD bypass disengaged
Applied voltage = 3 V
Applied voltage = 0 V
Disable pin transitions from low to high
Disable pin transitions from high to low
2.2
2.1
V
A
0.8
0.75 V
A
1
μA
C
0.1
μA
C
100
ns
C
200
ns
C
10
ns
C
(6) The logic input pins default to a logic '0' condition when left floating.
PIN NAME
Disable
HD bypass
Table 1. Logic Table
INPUT, OUTPUT
Input
Input
DEFAULT LOGIC
STATE
0
0
0
0
LOGIC STATES
0
1
0
1
DESCRIPTION
All channels enabled
All channels disabled
HD channels use 8th-order low-pass filters
HD channels bypass low-pass filters
8
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