THS7376 Datasheet, PDF (41/61 Pages) Texas Instruments – 4-Channel Video Amplifier with One SD and Three HD 8th-Order Filters with 6-dB Gain

THS7376
www.ti.com
SBOS692 – JUNE 2013
INPUT MODE OF OPERATION: DC
The device inputs allow for both ac- and dc-coupled inputs. Many DACs or video encoders can be dc-connected
to the THS7376. One of the drawbacks to dc-coupling arises when 0 V is applied to the input. Although the
device input allows for a 0-V input signal without issue, the output swing of a traditional amplifier cannot yield a
0-V signal, resulting in possible clipping. This limitation is true for any single-supply amplifier because of the
characteristics of the output transistors. Neither CMOS nor bipolar transistors can achieve 0 V while sinking
current. This transistor characteristic is also the same reason why the highest output voltage is always less than
the power-supply voltage when sourcing current.
This output clipping can reduce sync amplitudes (both horizontal and vertical sync) on the video signal. A
problem occurs if the video signal receiver uses an automatic gain control (AGC) loop to account for losses in the
transmission line. Some video AGC circuits derive gain from horizontal sync amplitude. If clipping occurs on the
sync amplitude, then the AGC circuit can increase the gain too much—resulting in too much luma and chroma
amplitude gain correction. This correction may result in a picture with an overly bright display with too much color
saturation.
Other AGC circuits use the chroma burst amplitude for amplitude control; reduction in the sync signals does not
alter the proper gain setting. However, good engineering design practice is to ensure that neither saturation nor
clipping takes place. Transistors always take a finite amount of time to come out of saturation. This saturation
could possibly result in timing delays or other aberrations on the signals.
To eliminate saturation or clipping problems, the THS7376 has a 105-mV input level shift feature. This feature
takes the input voltage and adds an internal +105-mV shift to the signal. Because the device also has a gain of 6
dB (2 V/V), the resulting output with a 0-V applied input signal is approximately 210 mV. The THS7376 rail-to-rail
output stage can create this output level while connected to a typical video load. This configuration ensures that
no saturation or clipping of the sync signals occur. This shift is constant, regardless of the input signal. For
example, if a 1-V input is applied, the output is 2.21 V.
Because the internal gain is fixed at +6 dB, the gain dictates what the allowable linear input voltage range can be
without clipping concerns. For example, if the power supply is set to 3 V, the maximum output is approximately
2.9 V while driving a significant amount of current. Thus, to avoid clipping, the allowable input is ([2.9 V / 2] –
0.105 V) = 1.345 V. This range is valid up to the maximum recommended 5-V power supply that allows
approximately a ([4.9 V / 2] – 0.105 V) = 2.345 V input range while avoiding clipping on the output.
The device input impedance in this mode of operation is dictated by the internal, 800-kΩ pull-down resistor, as
shown in Figure 131. Note that the internal voltage shift only appears at the output pin, not at the input pin.
V_S+
Input
Pin
Internal
Circuitry
800 kW
Level
Shift
Figure 131. Equivalent DC Input Mode Circuit
Copyright © 2013, Texas Instruments Incorporated
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