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DS92LV3242TVSX Datasheet, PDF (8/31 Pages) Texas Instruments – DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241, DS92LV3242
SNLS314D – SEPTEMBER 2009 – REVISED APRIL 2013
Electrical Characteristics(1)(2)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
LVCMOS DC SPECIFICATIONS
VIH
High Level Input Voltage
Tx: IOVDD = 1.71V to 1.89V
VIL
Low Level Input Voltage
Tx: IOVDD = 3.135V to 3.465V
Rx
Tx: IOVDD = 1.71V to 1.89V
Min
0.65 x
IOVDD
2.0
GND
Tx: IOVDD = 3.135V to 3.465V
Rx
VCL
Input Clamp Voltage
IIN
Input Current
VOH
High Level Output Voltage
VOL
Low Level Output Voltage
IOS
Output Short Circuit Current
IOZ
TRI-STATE Output Current
SERIALIZER LVDS DC SPECIFICATIONS
ICL = −18 mA
Tx: VIN = 0V or 3.465V(1.89V)
IOVDD = 3.465V(1.89V)
Rx: VIN = 0V or 3.465V
IOH = −2mA (Dual)
IOH = −2mA (Quad)
IOH = −2mA (Dual)
IOH = −2mA (Quad)
VOUT = 0V (Dual)
VOUT = 0V (Quad)
PDB = 0V,
VOUT = 0V or VDD
VOD
Output Differential Voltage
No pre-emphasis, VSEL = L
(VSEL = H)
ΔVOD
VOS
ΔVOS
IOS
Output Differential Voltage Unbalance
Offset Voltage
Offset Voltage Unbalance
Output Short Circuit Current
VSEL = L, No pre-emphasis
VSEL = L, No pre-emphasis
VSEL = L, No pre-emphasis
TxOUT[3:0] = 0V, PDB = VDD,
VSEL = L, No pre-emphasis
TxOUT[3:0] = 0V, PDB = VDD,
VSEL = H, No pre-emphasis
IOZ
TRI-STATE Output Current
PDB = 0V,
TxOUT[3:0] = 0V OR VDD
PDB = VDD,
TxOUT[3:0] = 0V OR VDD
RT
Output Termination
Internal differential output termination
between differential pairs
SERIALIZER SUPPLY CURRENT (DVDD, PVDD AND AVDD PINS)(3)
IDDTQ
Serializer (Tx) Total Supply Current
Quad Mode
(includes load current)
f = 85 MHz, CHECKER BOARD pattern
MODE = H, VSEL = H, PRE = OFF
f = 85 MHz, CHECKER BOARD pattern
MODE = H, VSEL = H, RPRE = 12 kΩ
f = 85 MHz, RANDOM pattern
MODE = H, VSEL = H, PRE = OFF
f = 85 MHz, RANDOM pattern
MODE = H, VSEL = H, RPRE = 12 kΩ
GND
−10
−10
2.4
GND
−10
350
(629)
1.00
−2
−6
−15
−15
90
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Typ
Max Units
IOVDD +
0.3
V
VDD
0.35 x
IOVDD
V
0.8
−0.8 −1.5
V
+10
µA
+10
3.0
VDD
V
0.33
0.5
V
−22
−40
mA
−33
−70
mA
+10
μA
440
(850)
1
1.25
4
−5
−10
525
(1000)
50
1.50
50
mVP-P
mVP-P
V
mV
mA
±1
+15
µA
±1
+15
µA
100
130
Ω
150
200
150
200
mA
140
195
140
195
(1) Typical values represent most likely parametric norms at VDD = 3.3V, TA = +25°C, and at the Recommended Operating Conditions at
the time of product characterization and are not verified.
(2) Current into a the device is defined as positive. Current out of a device pin is defined as negative. Voltages are referenced to ground
except VOD, ΔVOD, VTH, VTL which are differential voltages.
(3) DIGITAL, PLL, AND ANALOG VDDS
8
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