CD74HCT356 Datasheet, PDF(8/12 Page) Texas Instruments – High-Speed CMOS Logic 8-Input Multiplexer/Register, Three-State

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CD74HCT356 Datasheet, PDF (8/12 Pages) Texas Instruments – High-Speed CMOS Logic 8-Input Multiplexer/Register, Three-State

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CD74HCT356

Test Circuits and Waveforms (Continued)

trCL

CLOCK

INPUT

2.7V

0.3V

tfCL

1.3V

GND

DATA

INPUT

tSU(H)

tH(H)

1.3V

tH(L)

1.3V

tSU(L)

GND

OUTPUT

tREM

SET, RESET

OR PRESET

tTLH

90%

1.3V

tPLH

1.3V

tTHL

90%

1.3V

10%

tPHL

GND

50pF

6ns

OUTPUT

DISABLE

OUTPUT LOW

TO OFF

tPLZ

tPHZ

OUTPUT HIGH

TO OFF

OUTPUTS

ENABLED

2.7

1.3

6ns

0.3

tPZL

GND

10%

90%

tPZH

OUTPUTS

DISABLED

1.3V

OUTPUTS

ENABLED

FIGURE 5. 3-STATE PROPAGATION-DELAY WAVEFORM

FIGURE 4. SETUP TIMES, HOLD TIMES, REMOVAL TIME,

AND PROPAGATION-DELAY TIMES FOR EDGE

TRIGGERED SEQUENTIAL LOGIC CIRCUITS

OTHER

INPUTS

TIED HIGH

OR LOW

OUTPUT

DISABLE

IC WITH

3-STATE

OUTPUT

RL = 1kâ¦

50pF

VCC FOR tPLZ AND tPZL

GND FOR tPHZ AND tPZH

NOTE: Open-drain waveforms tPLZ and tPZL are the same as those for 3-state shown on the left. The test circuit is Output RL = 1kâ¦ to VCC,

CL = 50pF.

FIGURE 6. 3-STATE PROPAGATION-DELAY TEST CIRCUIT

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