CD74HCT356 Datasheet, PDF (7/12 Pages) Texas Instruments – High-Speed CMOS Logic 8-Input Multiplexer/Register, Three-State

CD74HCT356
Switching Specifications Input t_r, t_f = 6ns
PARAMETER
Propagation Delay,
CP→ Y, Y
Propagation Delay,
Sn → Y, Y
Propagation Delay,
LE → Y, Y
Output Disabling Time
Output Enabling Time
Output Transition Time
Input Capacitance
3-State Capacitance
Power Dissipation
Capacitance (Notes 4, 5)
SYMBOL
t_PLH, t_PHL
t_PLH, t_PHL
t_PLH, t_PHL
t_PLZ, t_PHZ
t_PLZ
t_PHZ
t_PLZ, t_PHZ
t_TLH, t_THL
C_IN
C_O
C_PD
TEST
CONDITIONS
C_L = 50pF
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 15pF
C_L = 50pF
C_L = 15pF
C_L = 50pF
-
-
-
V_CC (V)
4.5
5
4.5
5
4.5
5
4.5
5
5
4.5
5
4.5
-
-
5
25^oC
-40^oC TO 85^oC
TYP MAX
MAX
-
51
64
22
-
-
-
59
74
25
-
-
-
63
79
25
-
-
-
33
41
13
-
-
15
-
-
-
34
43
14
-
-
-
12
15
-
10
10
-
20
20
52
-
-
NOTES:
4. C_PD is used to determine the dynamic power consumption, per device.
5. P_D = V_CC2 (C_PD + C_L) where f_i = Input Frequency, C_L = Output Load Capacitance, V_CC = Supply Voltage.
-55^oC TO
125^oC
MAX
77
-
89
-
94
-
50
-
-
51
-
18
10
20
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
pF
Test Circuits and Waveforms
t_rC_L = 6ns
t_fC_L = 6ns
t_WL
+
t_WH
=
I
fC_L
CLOCK
2.7V
0.3V
1.3V
0.3V
1.3V
3V
1.3V
GND
t_WL
t_WH
NOTE: Outputs should be switching from 10% V_CC to 90% V_CC in
accordance with device truth table. For f_MAX, input duty cycle = 50%.
FIGURE 2. CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
t_r = 6ns
INPUT
t_THL
2.7V
1.3V
0.3V
INVERTING
OUTPUT
t_PHL
t_f = 6ns
3V
GND
t_TLH
90%
1.3V
10%
t_PLH
FIGURE 3. TRANSITION TIMES AND PROPAGATION-DELAY
TIMES, COMBINATION LOGIC
7