CD74FCT653 Datasheet, PDF (8/9 Pages) Texas Instruments – FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (B Side)

Test Circuits and Waveforms (Continued)
ENABLE
DISABLE
CONTROL INPUT
OUTPUT
NORMALLY LOW
t_PZL
SWITCH
CLOSED
t_PZH
OUTPUT SWITCH
NORMALLY HIGH OPEN
t_PLZ
3.5V
1.5V
t_PHZ
1.5V
0V
3V
1.5V
0V
3.5V
0.3V _VOL
0.3V ^VOH
0V
FIGURE 4. ENABLE AND DISABLE TIMING
SAME PHASE
INPUT TRANSITION
t_PLH
t_PHL
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
t_PLH
t_PHL
FIGURE 5. PROPAGATION DELAY
3V
1.5V
0V
V_OH
1.5V
V_OL
3V
1.5V
0V
OTHER
OUTPUTS
OUTPUT
UNDER
TEST
V_OH
V_OL
V_OH
V_OHV
V_OLP
V_OL
NOTES:
11. V_OLP is measured with respect to a ground reference near the output under test. V_OHV is measured with respect to V_OH.
12. Input pulses have the following characteristics:
P_RR ≤ 1MHz, t_r = 2.5ns, t_f = 2.5ns, skew 1ns.
13. R.F. fixture with 700MHz design rules required. IC should be soldered into test board and bypassed with 0.1µF capacitor. Scope and
probes require 700MHz bandwidth.
FIGURE 6. SIMULTANEOUS SWITCHING TRANSIENT WAVEFORMS
8-8