CD74FCT653 Datasheet, PDF (6/9 Pages) Texas Instruments – FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (B Side)

CD74FCT653, CD74FCT654
Switching Specifications Over Operating Range t_r, t_f = 2.5ns, C_L = 50pF, R_L (Figures 3, 4)
25^oC
0^oC TO 70^oC
Propagation Delays
PARAMETER
SYMBOL V_CC (V) TYP
MIN
MAX
Stored An → Bn
Stored An → Bn
Stored Bn → An
Stored Bn → An
An → Bn
An → Bn
Bn → An
Bn → An
Select to Data (B Bus)
CD74FCT653
t_PLH, t_PHL
5
6.8
2
9
CD74FCT654
t_PLH, t_PHL
5
6.8
2
9
CD74FCT653
t_PZL
5
6
2
8
t_PLZ
5
6.8
2
9
CD74FCT654
t_PZL, t_PLZ
5
6.8
2
9
CD74FCT653
t_PLH, t_PHL
5
6
2
8
CD74FCT654
t_PLH, t_PHL
5
6.8
2
9
CD74FCT653
t_PZL
5
6
2
8
t_PLZ
5
6.8
2
9
CD74FCT654
t_PZL, t_PLZ
5
6.8
2
9
CD74FCT653,
t_PLH, t_PHL
5
8.3
2
11
CD74FCT654
Select to Data (A Bus)
Select to Data (A Bus)
Three-State Enabling Times (B Bus),
Bus to Output or Register to Output
Three-State Disabling Time (B Bus),
Bus to Output or Register to Output
Off State Enabling Times (A Bus),
Bus to Output or Register to Output
Off State Disabling Time (A Bus),
Bus to Output or Register to Output
CD74FCT653
t_PZL
5
6
2
8
t_PLZ
5
6.8
2
9
CD74FCT654
t_PZL, t_PLZ
5
6.8
2
9
CD74FCT653
t_PZL, t_PZH
5
10.5
2
14
CD74FCT654
t_PZL, t_PZH
5
11.3
2
15
CD74FCT653
t_PLZ, t_PZH
5
6.8
2
9
CD74FCT654
t_PLZ, t_PZH
5
6.8
2
9
CD74FCT653
t_PZL
5
10.5
2
14
CD74FCT654
t_PZL
5
11.3
2
15
CD74FCT653
t_PLZ
5
6.8
2
9
CD74FCT654
t_PLZ
5
6.8
2
9
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Prerequisite for Switching t_r, t_f = 2.5ns, C_L = 50pF, R_L (Figures 3, 4)
PARAMETER
Maximum Frequency (B Side as Outputs)
Data to Clock Setup Time
Data to Clock Hold Time
Clock Pulse Width
SYMBOL
f_MAX
t_SU
t_H
t_W
V_CC (V)
5
(Note 8)
5
5
5
25^oC
TYP
-
-
-
-
0^oC TO 70^oC
MIN
MAX
80
-
4
-
2
-
6
-
UNITS
MHz
ns
ns
ns
8-6