TMS320DM641 Datasheet, PDF (78/171 Pages) Texas Instruments – Video/Imaging Fixed-Point Digital Signal Processors

Device Configurations
HD[15:0]
16
HRDY, HINT
HCNTL0, HCNTL1,
HHWIL, HAS, HR/W,
HCS, HDS1, HDS2
MTXD[3:0], MTXEN
MRXD[3:0], MRXER,
MRXDV, MCOL, MCRS,
MTCLK, MRCLK
MDIO, MDCLK
HPI
(16-Bit)
EMAC
MDIO
STCLK†
VP0CLK0
VP0CLK1,
VP0CTL[2:0],
VP0D[7:0]
AHCLKX0, AFSX0,
ACLKX0, AMUTE0,
AMUTEIN0,
AHCLKR0, AFSR0,
ACLKR0
AXR0[3:0]
VP0
(8-Bit)
McBSP0
McASP0 Control
McASP0 Data
EMIFA
Clock
and
System
TIMER2
TIMER1
TIMER0
GP0
and
EXT_INT
I2C0
32
AED[31:0]
AECLKIN, AARDY, AHOLD
AEA[22:3], ACE[3:0], ABE[3:0],
AECLKOUT1, AECLKOUT2,
ASDCKE, ASOE3, APDT,
AHOLDA, ABUSREQ,
AARE/ASDCAS/ASADS/ASRE,
AAOE/ASDRAS/ASOE,
AAWE/ASDWE/ASWE
CLKIN,
CLKMODE0, CLKMODE1
CLKOUT4, CLKOUT6, PLLV
TINP1
TOUT1/LENDIAN
TINP0
TOUT0/MAC_EN
GP0[3:0]
GP0[7:4]
SCL0
SDA0
McBSP1
VIC
VDAC
STCLK†
VP1CLK0
VP1CLK1,
VP1CTL[2:0],
VP1D[7:0]
VP1
(8-Bit)
Shading denotes a peripheral module not available for this configuration.
† _{STCLK supports both video ports (VP1 and VP0).}
PERCFG Register Value: 0x0000 0039
Extenal Pins:
TOUT0/MAC_EN = 1
Figure 2−6. Configuration Example A for DM641
(2 8-Bit Video Ports + 1 McASP0 + VIC + I2C0 + EMIF)
[TBD Application]
78 _SPRS222C
June 2003 − Revised August 2004